6.
    发明专利
    未知

    公开(公告)号:IT8020407D0

    公开(公告)日:1980-03-07

    申请号:IT2040780

    申请日:1980-03-07

    Applicant: IBM

    Abstract: A method for fabricating an interconnection package for a plurality of semiconductor chips which include the fabrication of a multi-layered glass-ceramic superstructure with a multi-layered distribution of conductors on a preformed multi-layered glass-ceramic base, by the repeatable steps of depositing a conductor pattern on the base and forming thereon a crystallizable glass dielectric layer which is then crystallized to a glass-ceramic prior to further additions of conductor patterns and crystallizable glass layers to form a monolithic compatible substrate all through. Semiconductor chips can be electrically connected to expose conductor patterns at the top surface of the resultant glass-ceramic package.

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