Integrated carbon nanotube sensor
    2.
    发明专利
    Integrated carbon nanotube sensor 有权
    集成碳纳米管传感器

    公开(公告)号:JP2006060227A

    公开(公告)日:2006-03-02

    申请号:JP2005238138

    申请日:2005-08-19

    Abstract: PROBLEM TO BE SOLVED: To provide a new structure and a new method for monitoring an operation of an acting integrated circuit in operation. SOLUTION: This invention relates to a method and a structure of an integrated circuit provided with a first transistor and an embeded carbon nanotube field effect transistor (CNT FET) which is adjacent to and smaller than the first transistor. The CNT FET is used for sensing a signal containing any of a temperature signal, a voltage signal, a current signal, an electric field signal and a magnetic field signal from the first transistor. Furthermore, the CNT FET is used for measuring a stress and a distortion in the integrated circuit containing any of a mechanical stress and a mechanical distortion as well as a thermal stress and a thermal distortion. Furthermore, the CNT FET is used for detecting a defective circuit in the integrated circuit. COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题:提供用于监视操作中的动作集成电路的操作的新结构和新方法。 解决方案:本发明涉及一种集成电路的方法和结构,该集成电路设置有与第一晶体管相邻且小于第一晶体管的第一晶体管和嵌入式碳纳米管场效应晶体管(CNT FET)。 CNT FET用于感测包含来自第一晶体管的任何温度信号,电压信号,电流信号,电场信号和磁场信号的信号。 此外,CNT FET用于测量包含任何机械应力和机械变形以及热应力和热变形的集成电路中的应力和变形。 此外,CNT FET用于检测集成电路中的故障电路。 版权所有(C)2006,JPO&NCIPI

    METHOD OF ADDING FABRICATION MONITORS TO INTEGRATED CIRCUIT CHIPS
    3.
    发明申请
    METHOD OF ADDING FABRICATION MONITORS TO INTEGRATED CIRCUIT CHIPS 审中-公开
    将制造监控器添加到集成电路卡的方法

    公开(公告)号:WO2006107356A3

    公开(公告)日:2007-11-22

    申请号:PCT/US2005047083

    申请日:2005-12-22

    CPC classification number: H01L22/20 H01L2924/0002 H01L2924/00

    Abstract: An integrated circuit, a method and a system for designing and a method fabricating the integrated circuit. The method including: (a) generating a photomask level design of an integrated circuit design (300) of the integrated circuit, the photomask level design comprising a multiplicity of integrated circuit element shapes; (b) designating regions of the photomask level design between adjacent integrated circuit element shapes, the designated regions large enough to require placement of fill shaped (305) between the adjacent integrated circuit elements based on fill shape rules (310), the fill shapes not required for the operation of the integrated circuit; and (c) placing one or more monitor structure shapes (320) of a monitor structure (315) in at least one of the designated regions, the monitor structure not required for the operation of the integrated circuit.

    Abstract translation: 一种用于设计的集成电路,方法和系统以及制造集成电路的方法。 该方法包括:(a)产生集成电路的集成电路设计(300)的光掩模级设计,光掩模级设计包括多个集成电路元件形状; (b)指定相邻集成电路元件形状之间的光掩模水平设计的区域,所指定的区域足够大,以便基于填充形状规则(310)在相邻集成电路元件之间放置填充形状(305),填充形状不 为集成电路的运行所需; 以及(c)将监视器结构(315)的一个或多个监视器结构形状(320)放置在所述指定区域中的至少一个中,所述监视器结构不是用于所述集成电路的操作所需要的。

    Integrated circuit wiring
    4.
    发明专利

    公开(公告)号:SG65720A1

    公开(公告)日:1999-06-22

    申请号:SG1997005154

    申请日:1997-12-08

    Applicant: IBM

    Abstract: An integrated distribution wiring system for a semiconductor substrate having a number of devices. The distribution system includes additional stripes which are arranged parallel to existing rails carrying power or signals to the devices. These stripes being separable from the rails may be used to make engineering changes such as repairs or modifications of the circuits in the devices or characterizing or diagnosing the devices.

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