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    INTEGRATED CIRCUIT SELECTIVE SCALING
    3.
    发明申请
    INTEGRATED CIRCUIT SELECTIVE SCALING 审中-公开
    集成电路选择性标定

    公开(公告)号：WO2006044730A2

    公开(公告)日：2006-04-27

    申请号：PCT/US2005037145

    申请日：2005-10-14

    Applicant: IBM ,  HENG FOOK-LUEN ,  HIBBELER JASON D ,  MCCULLEN KEVIN W ,  NARAYAN RANI R ,  RUNYON STEPHEN L ,  WALKER ROBERT F

    Inventor： HENG FOOK-LUEN ,  HIBBELER JASON D ,  MCCULLEN KEVIN W ,  NARAYAN RANI R ,  RUNYON STEPHEN L ,  WALKER ROBERT F

    IPC: G06F17/50

    CPC classification number: G06F17/5068

    Abstract: Methods, systems and program products are disclosed for selectively scaling (100) an integrated circuit (IC) design (200): by layer, by unit, or by ground rule, or a combination of these (130). The selective scaling technique can be applied in a feedback loop (408) with the manufacturing system (400) with process and yield feedback (300), during the life of a design, to increase yield in early processes in such a way that hierarchy is preserved. The invention removes the need to involve designers in improving yield where new technologies such as maskless fabrication are implemented.

    Abstract translation: 公开了用于根据层，单元或基础规则或这些的组合（130）选择性地缩放（100）集成电路（IC）设计（200）的方法，系统和程序产品。 选择性缩放技术可以在设计寿命期间与制造系统（400）一起在反馈回路（408）中应用于具有处理和产量反馈（300）的反馈回路（408）中，以提高早期处理中的产量，使得分级结构 保存。 本发明消除了在实现诸如无掩模制造的新技术的情况下涉及设计人员提高产量的需要。

    4.
    发明专利
    未知

    公开(公告)号：DE3382600T2

    公开(公告)日：1993-03-11

    申请号：DE3382600

    申请日：1983-11-23

    Applicant: IBM

    Inventor： CHRISTOPHER ROBERT J ,  WALKER ROBERT F

    IPC: G09G5/00 ,  G06F3/033 ,  G06F3/048 ,  G06F3/14 ,  G09G5/02 ,  G09G5/36 ,  G06F3/037

    Abstract: An apparatus for carrying out, at frame rates, entity detection and verification on bit-mapped raster graphic systems by providing an entity identification bit sequence with each feature of the picture displayed. The apparatus includes a display (13) coupled to a store (10) for input data, serially sending items of data to the display, together with means (24-27) for identifying the items of data so supplied, such that any item of data forming a selected feature, i.e., line, circle, background or the like of the display can be identified (29), and stored (20). Comparison (22) and register (20) means are used to drive a modulating means (18) to verify the display of the items of data, forming the selected feature, when a correlation (22) occurs between the selected feature (20) and the feature formed by the items of data sent (17,21) from the store. Verification (18) may be emphasizing, i.e., brightening, flashing, color change, etc. of the feature selected.

    5.
    发明专利
    未知

    公开(公告)号：DE3382600D1

    公开(公告)日：1992-09-03

    申请号：DE3382600

    申请日：1983-11-23

    Applicant: IBM

    Inventor： CHRISTOPHER ROBERT J ,  WALKER ROBERT F

    IPC: G09G5/00 ,  G06F3/033 ,  G06F3/048 ,  G06F3/14 ,  G09G5/02 ,  G09G5/36 ,  G06F3/037

    Abstract: An apparatus for carrying out, at frame rates, entity detection and verification on bit-mapped raster graphic systems by providing an entity identification bit sequence with each feature of the picture displayed. The apparatus includes a display (13) coupled to a store (10) for input data, serially sending items of data to the display, together with means (24-27) for identifying the items of data so supplied, such that any item of data forming a selected feature, i.e., line, circle, background or the like of the display can be identified (29), and stored (20). Comparison (22) and register (20) means are used to drive a modulating means (18) to verify the display of the items of data, forming the selected feature, when a correlation (22) occurs between the selected feature (20) and the feature formed by the items of data sent (17,21) from the store. Verification (18) may be emphasizing, i.e., brightening, flashing, color change, etc. of the feature selected.

    ENTITY CONTROLS FOR RASTER DISPLAYS
    6.
    发明专利
    ENTITY CONTROLS FOR RASTER DISPLAYS 未知

    公开(公告)号：CA1209287A

    公开(公告)日：1986-08-05

    申请号：CA443203

    申请日：1983-12-13

    Applicant: IBM

    Inventor： CHRISTOPHER ROBERT J ,  WALKER ROBERT F

    IPC: G09G5/00 ,  G06F3/033 ,  G06F3/048 ,  G06F3/14 ,  G09G5/02 ,  G09G5/36 ,  G09G1/00

    Abstract: ENTITY CONTROL FOR RASTER DISPLAYS An apparatus for carrying out, at frame rates, entity detection and verification on bit-mapped raster graphic systems by providing an entity identification bit sequence with each feature of the picture displayed. The apparatus includes a display coupled to a store for input data, serially sending items of data to the display, together with means for identifying the items of data so supplied, such that all the items of data forming a selected feature, i.e., line, circle, background or etc. of the display can be identified, and stored. Comparison and register means are used to drive a modulating means to verify the display of the items of data, forming the selected feature, when a correlation occurs between the selected feature and the feature formed by the items of data sent from the store. Verification may be emphasizing, i.e., brightening, flashing, color change, etc. the feature selected.

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