公开(公告)号：GB2516087A

公开(公告)日：2015-01-14

申请号：GB201312422

申请日：2013-07-11

Applicant: IBM

Inventor： NORTH GERAINT ,  STARKE WILLIAM ,  GUTHRIE GUY LYNN ,  WILLIAMS PHILLIP ,  SHEN HUGH ,  NAYAR NARESH

IPC: G06F12/08 ,  G06F9/455 ,  G06F11/14 ,  G06F11/20 ,  G06F12/0804 ,  G06F12/0806 ,  G06F12/0842 ,  G06F12/0891 ,  G06F12/0895

Abstract: A system comprises: a processor running a hypervisor for virtual machines (VMs) and multiple threads; a cache, e.g. a write-back cache; and a memory storing VM images for a differential check-pointing failover technique. Cache rows comprise a memory address, a cache line, an image modification flag, and a thread ID. A cache controller sets the modification flag (430) when a cache line is modified (420) by a backed-up VM (425). It also sets the thread ID of the thread corresponding to the backed-up VM and responsible for the modified cache line. Flagged cache lines addresses are written in a log of the memory upon eviction (440) or during periodic checkpoints. Replication of the VM image in another memory can be obtained by fetching the cache lines stored at the logged addresses. Using thread IDs in the logs allows the update of the correct VM memory image.