公开(公告)号：GB2497248B

公开(公告)日：2014-12-31

申请号：GB201305445

申请日：2011-07-20

Applicant: IBM

Inventor： AVOURIS PHAEDON ,  FARMER DAMON BROOKS ,  LIN YU-MING ,  ZHU YU

IPC: H01L29/16 ,  H01L29/417 ,  H01L29/423 ,  H01L29/778 ,  H01L29/786

Abstract: A method of forming a transistor structure is provided. The method includes forming a graphene layer on an insulating layer; forming a stack of a first metal portion and a second metal portion over the graphene layer, wherein sidewalls of the first metal portion are vertically coincident with sidewalls of the second metal portion; and laterally offsetting the sidewalls of the first metal portion relative to the sidewalls of the second metal portion by a lateral distance.

公开(公告)号：GB2497248A

公开(公告)日：2013-06-05

申请号：GB201305445

申请日：2011-07-20

Applicant: IBM

Inventor： AVOURIS PHAEDON ,  FARMER DAMON BROOKS ,  LIN YU-MING ,  ZHU YU

IPC: H01L29/16 ,  H01L29/417 ,  H01L29/423 ,  H01L29/778 ,  H01L29/786

Abstract: A graphene-based field effect transistor includes source and drain electrodes that are self-aligned to a gate electrode. A stack of a seed layer and a dielectric metal oxide layer is deposited over a patterned graphene layer. A conductive material stack of a first metal portion and a second metal portion is formed above the dielectric metal oxide layer. The first metal portion is laterally etched employing the second metal portion, and exposed portions of the dielectric metal oxide layer are removed to form a gate structure in which the second metal portion overhangs the first metal portion. The seed layer is removed and the overhang is employed to shadow proximal regions around the gate structure during a directional deposition process to form source and drain electrodes that are self-aligned and minimally laterally spaced from edges of the gate electrode.