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1.发明申请METHOD FOR ELIMINATING CRACK DAMAGE INDUCED BY DELAMINATING GATE CONDUCTOR INTERFACES IN INTEGRATED CIRCUITS 审中-公开消除集成电路中门极导体接口引起的裂纹损伤的方法
公开(公告)号：WO0245166A2
公开(公告)日：2002-06-06
申请号：PCT/US0151206
申请日：2001-11-13
Applicant: INFINEON TECHNOLOGIES CORP , IBM
Inventor： GUTHRIE WILLIAM , KLUWE ANDREAS , RUPRECHT MICHAEL
IPC: H01L21/301 , H01L21/78 , H01L23/58
CPC classification number: H01L21/78 , H01L23/585 , H01L2924/0002 , H01L2924/00
Abstract: A method for manufacturing integrated circuits ("IC") on wafers to manage crack damage in the ICs such that crack propagation into the IC active array is reduced or eliminated. The method provides for a defined separation or divide of the IC gate conductor from the IC crack stop or IC edge. The method is especially useful in managing crack damage induced through the delamination of one or more of the gate conductor surface interfaces as a result of the IC wafer dicing process. Circuits or chips manufactured according to the methods disclosed are also taught.
Abstract translation: 一种用于在晶片上制造集成电路（“IC”）的方法，用于管理IC中的裂纹损伤，从而减少或消除了对IC有源阵列的裂纹扩展。 该方法提供IC栅极导体与IC裂纹停止或IC边缘的限定分离或分离。 该方法在通过IC晶片切割工艺的结果来管理通过一个或多个栅极导体表面界面的分层而引起的裂纹损伤特别有用。 还教导了根据所公开的方法制造的电路或芯片。
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2.发明公开METHOD AND APPARATUS FOR ACCELERATED DETERMINATION OF ELECTROMIGRATION CHARACTERISTICS OF SEMICONDUCTOR WIRING 审中-公开方法和装置半导体布线电迁移自己的特色加速测定法
公开(公告)号：EP1438595A4
公开(公告)日：2009-11-04
申请号：EP02782155
申请日：2002-10-11
Applicant: IBM , INFINEON TECHNOLOGIES CORP
Inventor： FILIPPI RONALD G JR , STRONG ALVIN W , SULLIVAN TIMOTHY D , TIBEL DEBORAH , RUPRECHT MICHAEL , GRAAS CAROLE
IPC: G01R31/26 , H01L21/66 , H01L23/544 , G01R31/28
CPC classification number: H01L22/34 , G01R31/2858 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
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公开(公告)号：DE60135368D1
公开(公告)日：2008-09-25
申请号：DE60135368
申请日：2001-11-13
Applicant: INFINEON TECHNOLOGIES CORP , IBM
Inventor： GUTHRIE WILLIAM , KLUWE ANDREAS , RUPRECHT MICHAEL
IPC: H01L21/301 , H01L23/58 , H01L21/78
Abstract: A method for manufacturing integrated circuits ("IC") on wafers to manage crack damage in the ICs such that crack propagation into the IC active array is reduced or eliminated. The method provides for a defined separation or divide of the IC gate conductor from the IC crack stop or IC edge. The method is especially useful in managing crack damage induced through the delamination of one or more of the gate conductor surface interfaces as a result of the IC wafer dicing process. Circuits or chips manufactured according to the methods disclosed are also taught.
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