3.
    发明专利
    未知

    公开(公告)号:ES2150053T3

    公开(公告)日:2000-11-16

    申请号:ES96111221

    申请日:1992-01-30

    Abstract: A programmable EEPROM cell structure consisting in a split-gate structure in series with a coupling capacitor between the floating gate (16) and an additional program gate (19) in order to provide enhanced injection efficiency. The electron injection is controlled by a control gate (17) at the source side. The area of the coupling capacitor is selected with a substantial coupling factor to apply a high voltage to the floating gate (16) during programming so as to produce hot-electron injection at the split point in the channel region between the control gate (17) and the floating gate (16). Submicrosecond programming at a drain voltage not greater than 5 V can thereby be achieved.

    4.
    发明专利
    未知

    公开(公告)号:DE69231300D1

    公开(公告)日:2000-08-31

    申请号:DE69231300

    申请日:1992-01-30

    Abstract: A programmable EEPROM cell structure consisting in a split-gate structure in series with a coupling capacitor between the floating gate (16) and an additional program gate (19) in order to provide enhanced injection efficiency. The electron injection is controlled by a control gate (17) at the source side. The area of the coupling capacitor is selected with a substantial coupling factor to apply a high voltage to the floating gate (16) during programming so as to produce hot-electron injection at the split point in the channel region between the control gate (17) and the floating gate (16). Submicrosecond programming at a drain voltage not greater than 5 V can thereby be achieved.

    5.
    发明专利
    未知

    公开(公告)号:DK0501941T3

    公开(公告)日:1997-04-01

    申请号:DK92870016

    申请日:1992-01-30

    Abstract: A programmable EEPROM cell structure consisting in a split-gate structure in series with a coupling capacitor between the floating gate (16) and an additional program gate (19) in order to provide enhanced injection efficiency. The electron injection is controlled by a control gate (17) at the source side. The area of the coupling capacitor is selected with a substantial coupling factor to apply a high voltage to the floating gate (16) during programming so as to produce hot-electron injection at the split point in the channel region between the control gate (17) and the floating gate (16). Submicrosecond programming at a drain voltage not greater than 5 V can thereby be achieved.

    6.
    发明专利
    未知

    公开(公告)号:AT144651T

    公开(公告)日:1996-11-15

    申请号:AT92870016

    申请日:1992-01-30

    Abstract: A programmable EEPROM cell structure consisting in a split-gate structure in series with a coupling capacitor between the floating gate (16) and an additional program gate (19) in order to provide enhanced injection efficiency. The electron injection is controlled by a control gate (17) at the source side. The area of the coupling capacitor is selected with a substantial coupling factor to apply a high voltage to the floating gate (16) during programming so as to produce hot-electron injection at the split point in the channel region between the control gate (17) and the floating gate (16). Submicrosecond programming at a drain voltage not greater than 5 V can thereby be achieved.

    7.
    发明专利
    未知

    公开(公告)号:DE69619321T2

    公开(公告)日:2002-10-10

    申请号:DE69619321

    申请日:1996-08-07

    Abstract: Fast 5V-only programming of a Flash EEPROM cell or array of such cells is disclosed. Use is made of an enhanced source-side injection mechanism. This concept requires a program gate in the field oxide region which serves to capacitively couple a high voltage to the floating gates. Thus a very high injection current is established during programming. This additional program gate, however, increases the cell area considerably. The present disclosure shows a contactless 5V-only Flash EEPROM array configuration that relies on shared program lines in order to minimize the area overhead that is caused by this program gate. Furthermore, a memory array with shared wordlines is presented which further enhances the density achievable.

    8.
    发明专利
    未知

    公开(公告)号:AT195034T

    公开(公告)日:2000-08-15

    申请号:AT96111221

    申请日:1992-01-30

    Abstract: A programmable EEPROM cell structure consisting in a split-gate structure in series with a coupling capacitor between the floating gate (16) and an additional program gate (19) in order to provide enhanced injection efficiency. The electron injection is controlled by a control gate (17) at the source side. The area of the coupling capacitor is selected with a substantial coupling factor to apply a high voltage to the floating gate (16) during programming so as to produce hot-electron injection at the split point in the channel region between the control gate (17) and the floating gate (16). Submicrosecond programming at a drain voltage not greater than 5 V can thereby be achieved.

    9.
    发明专利
    未知

    公开(公告)号:ES2095453T3

    公开(公告)日:1997-02-16

    申请号:ES92870016

    申请日:1992-01-30

    Abstract: A programmable EEPROM cell structure consisting in a split-gate structure in series with a coupling capacitor between the floating gate (16) and an additional program gate (19) in order to provide enhanced injection efficiency. The electron injection is controlled by a control gate (17) at the source side. The area of the coupling capacitor is selected with a substantial coupling factor to apply a high voltage to the floating gate (16) during programming so as to produce hot-electron injection at the split point in the channel region between the control gate (17) and the floating gate (16). Submicrosecond programming at a drain voltage not greater than 5 V can thereby be achieved.

    10.
    发明专利
    未知

    公开(公告)号:DE69636178T2

    公开(公告)日:2007-03-29

    申请号:DE69636178

    申请日:1996-08-07

    Abstract: Fast 5V-only programming of a Flash EEPROM cell or array of such cells is disclosed. Use is made of an enhanced source-side injection mechanism. This concept requires a program gate in the field oxide region which serves to capacitively couple a high voltage to the floating gates. Thus a very high injection current is established during programming. This additional program gate, however, increases the cell area considerably. The present disclosure shows a contactless 5V-only Flash EEPROM array configuration that relies on shared program lines in order to minimize the area overhead that is caused by this program gate. Furthermore, a memory array with shared wordlines is presented which further enhances the density achievable.

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