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公开(公告)号:DE10342057B4
公开(公告)日:2005-10-20
申请号:DE10342057
申请日:2003-09-11
Applicant: INFINEON TECHNOLOGIES AG
Inventor: DI GIANDOMENICO ANTONIO , WIESBAUER ANDREAS , CLARA MARTIN
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公开(公告)号:DE102004045709B4
公开(公告)日:2009-03-19
申请号:DE102004045709
申请日:2004-09-21
Applicant: INFINEON TECHNOLOGIES AG
Inventor: CLARA MARTIN , KOLHAUPT KLAUS , WIESBAUER ANDREAS , DI GIANDOMENICO ANTONIO
Abstract: An amplifier and method of setting the amplifier is presented. The amplifier is set by setting a mean value between voltage values at first and second outputs of the amplifier. The mean value is pulled towards a certain voltage potential. A circuit node is coupled to the first and to the second output. The circuit node is connected, via at least one resistor and a respective switch, to the certain voltage potential assigned to the respective resistor.
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公开(公告)号:DE10342057A1
公开(公告)日:2005-05-12
申请号:DE10342057
申请日:2003-09-11
Applicant: INFINEON TECHNOLOGIES AG
Inventor: DI GIANDOMENICO ANTONIO , WIESBAUER ANDREAS , CLARA MARTIN
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公开(公告)号:DE102005017305A1
公开(公告)日:2006-10-19
申请号:DE102005017305
申请日:2005-04-14
Applicant: INFINEON TECHNOLOGIES AG
Inventor: CLARA MARTIN , DI GIANDOMENICO ANTONIO , KLATZER WOLFGANG , GORI LUCA
Abstract: The converter has two segments of partitioned cell arrangement (14) wit number of converter cells (15a, 17a) and redundant converter cells (15b, 17b). Weighted redundant converter cells are provided in the two segments . The converter cells and the redundant converter cells have same weight within the segments. An online-self calibration unit contains an individual reference cell for calibrating the converter cells (15a, 17a). An independent claim is also included for a method of online-calibration of converter cells of a digital to analog converter.
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公开(公告)号:DE102004045709A1
公开(公告)日:2006-04-06
申请号:DE102004045709
申请日:2004-09-21
Applicant: INFINEON TECHNOLOGIES AG
Inventor: CLARA MARTIN , KOLHAUPT KLAUS , WIESBAUER ANDREAS , DI GIANDOMENICO ANTONIO
Abstract: An amplifier and method of setting the amplifier is presented. The amplifier is set by setting a mean value between voltage values at first and second outputs of the amplifier. The mean value is pulled towards a certain voltage potential. A circuit node is coupled to the first and to the second output. The circuit node is connected, via at least one resistor and a respective switch, to the certain voltage potential assigned to the respective resistor.
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公开(公告)号:DE10254651B3
公开(公告)日:2004-11-04
申请号:DE10254651
申请日:2002-11-22
Applicant: INFINEON TECHNOLOGIES AG
Inventor: DI GIANDOMENICO ANTONIO , DOERRER LUKAS , WIESBAUER ANDREAS
Abstract: The invention relates to a quantizer ( 1 ) for a sigma delta modulator ( 10 ) having at least one input stage ( 2 ), the quantizer quantizing an input signal ( 21 ) present at its input stage in accordance with at least one threshold signal and outputting it as result value ( 22 ) at a digital result output ( 23 ). Furthermore, the invention relates to a sigma delta modulator having such a quantizer.
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公开(公告)号:DE102005017304B3
公开(公告)日:2006-11-02
申请号:DE102005017304
申请日:2005-04-14
Applicant: INFINEON TECHNOLOGIES AG
Inventor: CLARA MARTIN , DI GIANDOMENICO ANTONIO , KLATZER WOLFGANG , GORI LUCA
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公开(公告)号:DE50207726D1
公开(公告)日:2006-09-14
申请号:DE50207726
申请日:2002-12-18
Applicant: INFINEON TECHNOLOGIES AG
Inventor: DI GIANDOMENICO ANTONIO , DOERRER LUKAS , WIESBAUER ANDREAS
IPC: H03M3/00
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