公开(公告)号：DE10342275A1

公开(公告)日：2004-03-25

申请号：DE10342275

申请日：2003-09-12

Applicant: INFINEON TECHNOLOGIES AG

Inventor： DIETZ JAMES J ,  MA DAVID SUITWAI ,  REN BING ,  WANG TAO

IPC: G01R31/317 ,  G01R31/3187 ,  G01R31/3193 ,  H01L21/66

Abstract: The write registers (102,104,106) write original data onto the dies (114) of a semiconductor wafer. A comparator compares original data from the write registers and the read data received from the die, to generate test result of the die. An Independent claim is also included for die testing method.

公开(公告)号：DE10349606A1

公开(公告)日：2004-06-17

申请号：DE10349606

申请日：2003-10-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： DIETZ JAMES J ,  MA DAVID SUITWAI

IPC: G11C29/48 ,  G11C29/00

Abstract: A memory includes input/output paths and electrical leads. Each of the input/output paths are coupled to separate electrical leads. The memory is configured to operate in a test architecture and an operating architecture. In the test architecture, logic enables a greatest number of input/output paths. In the operating architecture, the memory enables the same or fewer input/output paths. The method of selecting a configuration includes establishing an operating and a test architecture and testing the memory in its greater input/output configuration.

公开(公告)号：DE10342312A1

公开(公告)日：2004-04-01

申请号：DE10342312

申请日：2003-09-12

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ALEXANDER GEORGE WILLIAM ,  DIETZ JAMES J ,  MA DAVID SUITWAI

IPC: G01R31/317 ,  H01L23/58 ,  H01L21/66 ,  G01R31/28

公开(公告)号：DE10337033A1

公开(公告)日：2004-03-25

申请号：DE10337033

申请日：2003-08-12

Applicant: INFINEON TECHNOLOGIES AG

Inventor： DIETZ JAMES J ,  MA DAVID SUITWAI ,  REN BING

IPC: G01R1/04 ,  G11C5/04 ,  H01R4/38 ,  H01R33/76

Abstract: An apparatus for mounting a semiconductor device to a circuit board for testing is disclosed. The semiconductor device includes semiconductor circuitry and leads to connect the semiconductor circuitry to the circuit board. Additionally, the semiconductor device is decapped so that at least a portion of the semiconductor circuitry is exposed. The apparatus includes a frame and a fastener. The frame is adapted to mate with the semiconductor device, and forms an opening for accessing the semiconductor circuitry and an edge surface for receiving the semiconductor device. The fastener is connected with the frame for removably connecting the frame to the circuit board. By using a frame instead of a socket, the distance to the semiconductor device once the device is mounted to the circuit board, and particularly the top side of the semiconductor device, can be reduced so that the device may be tested using a probe.

公开(公告)号：DE10341554A1

公开(公告)日：2004-03-25

申请号：DE10341554

申请日：2003-09-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ALEXANDER GEORGE WILLIAM ,  DIETZ JAMES J ,  MA DAVID SUITWAI

IPC: G01R31/28 ,  H01L21/66 ,  H01L21/78

Abstract: The system has an isolation block connected to a semiconductor die. A routing mechanism (114) is connected to the isolation block. The die is electrically disconnected from the routing mechanism when the block is activated. A die test pad is connected to the semiconductor die and the isolation block. The test pad is electrically disconnected from the routing mechanism when the isolation block is activated. An Independent claim is also included for a method of isolating a semiconductor die.