公开(公告)号：AT518240T

公开(公告)日：2011-08-15

申请号：AT00101726

申请日：2000-01-27

Applicant: IBM ,  INFINEON TECHNOLOGIES AG

Inventor： HO HERBERT ,  SRINIVASAN RADHIKA ,  HAMMERL ERWIN ,  AGAHI FARID ,  BRONNER GARY ,  FLIETNER BERTRAND

IPC: H01L21/76 ,  H01L21/762

Abstract: A reduction in parasitic leakages of shallow trench isolation vias is disclosed wherein the distance between the silicon nitride liner and the active silicon sidewalls is increased by depositing an insulating oxide layer prior to deposition of the silicon nitride liner. Preferably, the insulating oxide layer comprises tetraethylorthosilicate. The method comprises of etching one or more shallow trench isolations into a semiconductor wafer; depositing an insulating oxide layer into the trench; growing a thermal oxide in the trench; and depositing a silicon nitride liner in the trench. The thermal oxide may be grown prior to or after deposition of the insulating oxide layer.

公开(公告)号：DE69632768D1

公开(公告)日：2004-07-29

申请号：DE69632768

申请日：1996-09-04

Applicant: IBM ,  INFINEON TECHNOLOGIES AG

Inventor： HO HERBERT ,  HAMMERL ERWIN ,  DOBUZINSKY DAVID M ,  PALM J HERBERT ,  FUGARDI STEPHEN ,  AJMERA ATUL ,  MOSEMAN JAMES E ,  RAMAC SAMUEL C

IPC: H01L21/76 ,  H01L21/3105 ,  H01L21/318 ,  H01L21/32 ,  H01L21/762 ,  H01L21/763 ,  H01L21/334

Abstract: Silicon integrated circuits use a crystalline layer of silicon nitride (Si3N4) in shallow trench isolation (STI) structures as an O2-barrier film. The crystalline Si3N4 lowers the density of electron traps as compared with as-deposited, amorphous Si3N4. Further, a larger range of low-pressure chemical-vapor deposited (LPCVD) Si3N4 films can be deposited, providing a larger processing window for thickness controllability. An LPCVD-Si3N4 film is deposited at temperatures of 720 DEG C to 780 DEG C. The deposited film is in an amorphous state. Subsequently, a high-temperatures rapid-thermal anneal in pure nitrogen or ammonia is conducted at 1050 DEG C to 1100 DEG C for 60 seconds.

公开(公告)号：DE69632768T2

公开(公告)日：2005-07-07

申请号：DE69632768

申请日：1996-09-04

Applicant: IBM ,  INFINEON TECHNOLOGIES AG

Inventor： HO HERBERT ,  HAMMERL ERWIN ,  DOBUZINSKY DAVID M ,  PALM J HERBERT ,  FUGARDI STEPHEN ,  AJMERA ATUL ,  MOSEMAN JAMES E ,  RAMAC SAMUEL C

IPC: H01L21/76 ,  H01L21/3105 ,  H01L21/318 ,  H01L21/32 ,  H01L21/762 ,  H01L21/763 ,  H01L21/334

Abstract: Silicon integrated circuits use a crystalline layer of silicon nitride (Si3N4) in shallow trench isolation (STI) structures as an O2-barrier film. The crystalline Si3N4 lowers the density of electron traps as compared with as-deposited, amorphous Si3N4. Further, a larger range of low-pressure chemical-vapor deposited (LPCVD) Si3N4 films can be deposited, providing a larger processing window for thickness controllability. An LPCVD-Si3N4 film is deposited at temperatures of 720 DEG C to 780 DEG C. The deposited film is in an amorphous state. Subsequently, a high-temperatures rapid-thermal anneal in pure nitrogen or ammonia is conducted at 1050 DEG C to 1100 DEG C for 60 seconds.

公开(公告)号：DE19749378B4

公开(公告)日：2006-10-26

申请号：DE19749378

申请日：1997-11-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PINDL STEPHAN ,  HAMMERL ERWIN ,  SCHAEFER HERBERT

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/336 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417

公开(公告)号：DE69705443T2

公开(公告)日：2002-05-16

申请号：DE69705443

申请日：1997-02-13

Applicant: IBM ,  INFINEON TECHNOLOGIES AG

Inventor： STENGL REINHARD J ,  HAMMERL ERWIN ,  MANDELMAN JACK A ,  HO HERBERT L ,  SRINIVASAN RADHIKA ,  SHORT ALVIN P

IPC: H01L27/00 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/108

Abstract: In a method for making an electrical connection between a trench storage capacitor and an access transistor in a DRAM cell, the electrical connection (90) is formed through the selectively controlled outdiffusion of either N-type or P-type dopants present in the trench through a single crystalline semiconducting material (60) which is grown by epitaxy (epi) from the trench sidewall. This epitaxially grown single crystalline layer acts as a barrier to excessive dopant outdiffusion which can occur in the processing of conventional DRAMs.

公开(公告)号：DE69705443D1

公开(公告)日：2001-08-09

申请号：DE69705443

申请日：1997-02-13

Applicant: IBM ,  INFINEON TECHNOLOGIES AG

Inventor： STENGL REINHARD J ,  HAMMERL ERWIN ,  MANDELMAN JACK A ,  HO HERBERT L ,  SRINIVASAN RADHIKA ,  SHORT ALVIN P

IPC: H01L27/00 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/108

Abstract: In a method for making an electrical connection between a trench storage capacitor and an access transistor in a DRAM cell, the electrical connection (90) is formed through the selectively controlled outdiffusion of either N-type or P-type dopants present in the trench through a single crystalline semiconducting material (60) which is grown by epitaxy (epi) from the trench sidewall. This epitaxially grown single crystalline layer acts as a barrier to excessive dopant outdiffusion which can occur in the processing of conventional DRAMs.