公开(公告)号：DE102004025658A1

公开(公告)日：2005-12-29

申请号：DE102004025658

申请日：2004-05-26

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STADLER WOLFGANG ,  ERTLE WERNER ,  GOLLER BERND ,  HORN MICHAEL ,  HERMANN MANFRED ,  MICCOLI GIUSEPPE

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/50 ,  H01L23/62

Abstract: A semiconductor circuit containing a pad for electrical bonding of the semiconductor circuit and a metal arrangement disposed beneath the pad. The metal arrangement is in a metal layer of the semiconductor circuit located closest to the pad and is electrically insulated from the pad and from a strip conductor located beneath the metal arrangement. More than one metal layer can contain a metal arrangement. Each metal arrangement is a full-area plate that overlaps all edges of the pad or has a regular structure of small square plates. If adjacent metal arrangements are constructed from small plates, the plates in one metal arrangement overlap to cover gaps in the other metal arrangement.