公开(公告)号：WO2005013364A3

公开(公告)日：2005-03-24

申请号：PCT/DE2004001488

申请日：2004-07-08

Applicant: INFINEON TECHNOLOGIES AG ,  FUERGUT EDWARD ,  GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  JEREBIC SIMON ,  POHL JENS ,  STROBEL PETER ,  WOERNER HOLGER

Inventor： FUERGUT EDWARD ,  GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  JEREBIC SIMON ,  POHL JENS ,  STROBEL PETER ,  WOERNER HOLGER

IPC: H01L23/31 ,  H01L23/495 ,  H01L25/065

CPC classification number: H01L23/3128 ,  H01L23/49537 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/065 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05571 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05099 ,  H01L2924/00012

Abstract: The invention relates to an electronic component (1) comprising stacked semiconductor chips (3,4) and a panel (23) for producing the component (1). Said stack (2) has a flat conductor structure (8) with a chip island (9) on which a stacked semiconductor chip (4) is arranged, a first semiconductor chip (3) being arranged below the chip island. Said chip island (9) is surrounded by flat conductors (10) comprising contact columns (11). Said contact columns (11) have column contact surfaces (13) which form a coplanar complete upper side (16) together with the active upper side (5) of the first semiconductor chip (3) and upper side regions (14) of a plastic housing mass (15).

Abstract translation: 本发明涉及一种具有堆叠的半导体芯片（3,4）和用于制造部件（1）的设备（23）的电子部件（1）。 为此，在平坦的导体结构（8）用芯片岛（9）堆（2）布置，其堆叠半导体芯片（4）上，而包括第一半导体芯片（3）的位置。 芯片岛（9）被具有接触柱（11）的扁平导体（10）包围。 这些触点柱（11）具有柱的接触面（13）的第一半导体芯片（3）和顶部部分（14）的，其与有源顶部侧一起（5）形成的塑料外壳组合物（15），共面整体顶侧（16）。

公开(公告)号：WO2004100261A3

公开(公告)日：2005-02-10

申请号：PCT/DE2004000936

申请日：2004-05-04

Applicant: INFINEON TECHNOLOGIES AG ,  GOLLER BERND

Inventor： GOLLER BERND

IPC: H01L21/56 ,  H01L21/98 ,  H01L23/16 ,  H01L23/31 ,  H01L25/065 ,  H01L21/68

CPC classification number: H01L24/82 ,  H01L21/561 ,  H01L21/568 ,  H01L23/16 ,  H01L23/3114 ,  H01L24/19 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/18 ,  H01L2224/73209 ,  H01L2224/92124 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/05599

Abstract: The invention relates to a semiconductor wafer, a panel, an electronic component (26), and a method for the production thereof. Said electronic component (26) comprises a stack consisting of two semiconductor chips (4, 10). The top stacked semiconductor chip (10) is thinly ground and is disposed on a central area (5) of the bottom semiconductor chip (4) according to the flip chip technique. Contacts which contact a rewiring layer (22) through a leveling layer (12) are arranged in an edge area (7) of the bottom semiconductor chip (4). The rewiring layer (22) supports external contacts (25).

Abstract translation: 本发明涉及一种半导体晶片，益处以及它们的制备的电子部件（26），以及方法。 在这种情况下（10 4），电子部件（26）包括两个半导体芯片的堆叠。 上层叠的半导体芯片（10）通过研磨和使用倒装芯片技术在下部半导体芯片（4）的中心区域（5）变薄。 在下部半导体芯片的边缘区域（7）（4）是通过布置（22）的布线层的平坦化层（12）的通孔，进而，发送外部触头（25）。

公开(公告)号：WO2004100253A2

公开(公告)日：2004-11-18

申请号：PCT/DE2004000934

申请日：2004-05-04

Applicant: INFINEON TECHNOLOGIES AG ,  GOLLER BERND

Inventor： GOLLER BERND

IPC: H01L21/98 ,  H01L23/538 ,  H01L25/065 ,  H05K1/18 ,  H05K3/20 ,  H05K3/42 ,  H05K3/46 ,  H01L21/68

CPC classification number: H01L25/50 ,  H01L21/568 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05571 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01052 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H05K1/185 ,  H05K1/187 ,  H05K3/205 ,  H05K3/423 ,  H05K3/4647 ,  Y10T29/49121 ,  H01L2224/81 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: The invention relates to an electronic component (3) as well as system supports and panels that are used for the production thereof. The inventive electronic component comprises a first semiconductor chip (11) and a second semiconductor chip (17) that is arranged on a plastic material (13) within which the first semiconductor chip (11) is embedded. The semiconductor chips are interconnected via rewiring layers and penetrating contacts which extend between the rewiring layers. Said penetrating contacts (6) are enlarged at a passage to one of the rewiring layers.

Abstract translation: 本发明涉及的电子部件（3）和系统的载体和它们的制备的益处。 所述的电子部件具有第一半导体芯片（11）和被布置在塑料的质量（13），其中，所述第一半导体芯片（11）被嵌入的第二半导体芯片（17）。 半导体芯片通过Umverdrahtungslagen和Umverdrahtungslagen彼此，其特征在于，所述通孔（6）在一个结加宽到Umverdrahtungslagen之一之间延伸的通孔连接。

公开(公告)号：WO2004070382A2

公开(公告)日：2004-08-19

申请号：PCT/DE2004000165

申请日：2004-02-03

Applicant: INFINEON TECHNOLOGIES AG ,  GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  OFNER GERALD ,  STUEMPFL CHRISTIAN ,  BAUER MICHAEL ,  WOERNER HOLGER

Inventor： GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  OFNER GERALD ,  STUEMPFL CHRISTIAN ,  BAUER MICHAEL ,  WOERNER HOLGER

IPC: B01L3/00 ,  B01L9/00 ,  G01N33/487 ,  G01N27/327

CPC classification number: G01N33/48785 ,  B01L3/502715 ,  B01L9/52 ,  B01L2200/027 ,  B01L2300/0819 ,  B01L2300/0877 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention relates to a measuring instrument and a measuring method for chip card-shaped biosensors (1), and methods for the production thereof. The biosensor (1) is provided with a semiconductor chip (2) having a bioactive structure (3) and contact areas (4). The biosensor (1) is covered by a rewiring substrate (6) which protrudes from the semiconductor chip (2) such that outer contact surfaces of the rewiring substrate (6) are freely accessible. Both the biosensor (1) and the measuring instrument that is adapted thereto are designed as disposable products.

Abstract translation: 本发明涉及一种测量仪器和用于芯片卡状生物传感器（1）和方法的测量方法用于制造相同的。 为了这个目的，一个半导体芯片（2）在生物传感器上（1）与生物活性结构（3）和接触区（4）。 所述的生物传感器（1）由再布线基板盖住。 内插基板（6）超过半导体芯片的项目（2），以使内插基板的外接触表面（6）的自由接近。 无论是生物传感器（1）和适于此计被设计为一次性产品。

公开(公告)号：WO2004015773A3

公开(公告)日：2004-04-29

申请号：PCT/DE0302544

申请日：2003-07-29

Applicant: INFINEON TECHNOLOGIES AG ,  ERTLE WERNER ,  GOLLER BERND ,  HORN MICHAEL ,  KOTHE BERND

Inventor： ERTLE WERNER ,  GOLLER BERND ,  HORN MICHAEL ,  KOTHE BERND

IPC: H01L23/58

CPC classification number: H01L24/06 ,  H01L22/32 ,  H01L24/05 ,  H01L2224/02166 ,  H01L2224/0392 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/4943 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01052 ,  H01L2924/01057 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The invention relates to an arrangement of contact surfaces (1) and testing surfaces (2) on a structured semiconductor chip (3). The contact surfaces (1) and testing surfaces (2) are electrically connected to one another via a conducting web (4). While the contact surfaces (1) are arranged in a first area (5) that does not contain any components of an integrated circuit, the testing surfaces (2) are located in a second area (7) of the upper side of the semiconductor chip (3) that contains components (6) of an integrated circuit.

Abstract translation: 本发明涉及一种接触区域（1）和测试区（2）的图案化的上半导体芯片（3）的布置。 的接触表面（1）和所述测试表面（2）是通过传导网络电连接到彼此（4）。 半导体芯片（3），该部件的顶部的，而接触面（1）是在第一区域（5），它没有集成电路的部件，布置，测试表面（2）位于第二区域（7）（6 ）的集成电路具有。

公开(公告)号：WO03015165A3

公开(公告)日：2003-07-31

申请号：PCT/DE0202811

申请日：2002-07-31

Applicant: INFINEON TECHNOLOGIES AG ,  GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  OFNER GERALD ,  STUEMPFL CHRISTIAN ,  WEIN STEFAN ,  WOERNER HOLGER ,  THUMBS JOSEF

Inventor： GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  OFNER GERALD ,  STUEMPFL CHRISTIAN ,  WEIN STEFAN ,  WOERNER HOLGER ,  THUMBS JOSEF

IPC: H01L23/12 ,  H01L21/56 ,  H01L21/68 ,  H01L23/31

CPC classification number: H01L21/561 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3107 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/0508 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/83104 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01052 ,  H01L2924/01061 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2224/11

Abstract: The invention relates to an electronic component, in which a semiconductor chip (3) is arranged, with a plastic housing (2) and method for production thereof. The lower side (6) of the plastic housing (2) comprises external contacts (7). The external contacts (7) are connected to contact surfaces (11) on the active upper side (12) of the semiconductor chip (3) by means of contact pegs (8) on the semiconductor chip (3) and by interconnecting lines (10) arranged on the plastic housing body (9). The contact pegs (8) thus represent an electrically-conducting projection of the contact surfaces (11).

Abstract translation: 本发明涉及一种具有塑料壳体（2）的电子部件及其制造方法，其中布置有半导体芯片（3）。 塑料外壳（2）的下侧（6）具有外部触点（7）。 外触点（7）通过接触柱连接在所述半导体芯片的（8）（3），并且在塑料外壳的组合物（9），布置连接到接触上的半导体芯片（3）的有源顶部侧（12）的表面（11）重新布线线（10）。 接触柱（8）表示接触表面（11）的导电高度。

公开(公告)号：DE102018208230B4

公开(公告)日：2021-01-28

申请号：DE102018208230

申请日：2018-05-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： LORENZ GUNAR ,  GOLLER BERND

IPC: B81B7/02 ,  B81C3/00 ,  H01L21/50 ,  H01L25/16 ,  H04R19/04

Abstract: MEMS-Baustein (100) mit folgenden Merkmalen:einem Gehäuse (102), wobei das Gehäuse (102) ein Substrat (104) und ein daran angeordnetes Abdeckungselement (106) aufweist, wobei in dem Abdeckungselement (106) eine Durchgangsöffnung (108) vorgesehen ist,einem MEMS-Bauelement (110), das innerhalb des Gehäuses (102) an dem Abdeckungselement (106) angeordnet ist,einer integrierten Schaltungsanordnung (112), die innerhalb des Gehäuses (102) an dem Substrat (104) angeordnet ist, undeinem Support-Chip (114), der innerhalb des Gehäuses (102) an dem Substrat (104) angeordnet ist,wobei der an dem Substrat (104) angeordnete Support-Chip (114) mittels erster elektrischer Verbindungsleitungen (116) elektrisch mit dem an dem Abdeckungselement (106) angeordneten MEMS-Bauelement (110) gekoppelt ist, und ferner mittels zweiter elektrischer Verbindungsleitungen (118) elektrisch mit der an dem Substrat (104) angeordneten Schaltungsanordnung (112) gekoppelt ist, um mittels Kontaktflächen (114-1, 114-2) und Verbindungsleitungen (114-3), die an einem Oberflächenbereich (114-A) des Support-Chips (114) angeordnet sind, eine elektrische Verbindung zwischen dem MEMS-Bauelement (110) und der integrierten Schaltungsanordnung (112) herzustellen,wobei die Kontaktflächen (114-1) des Support-Chips (114) um eine Höhe (h114) des Support-Chips (114) beabstandet von dem Substrat (104) mit einer darin angeordneten Leiterbahn oder Metallisierungsebene angeordnet sind, undwobei an dem Oberflächenbereich (114-A) des Support-Chips (114), der einem Oberflächenbereich (110-A) des MEMS-Bauelements (110) gegenüberliegt, die Kontaktflächen (114-1) zumindest bereichsweise spiegelverkehrt zu den an dem Oberflächenbereich (110-A) des MEMS-Bauelements (110) angeordneten Kontaktanschlussflächen (110-1) ausgebildet sind.

公开(公告)号：DE102017221082A1

公开(公告)日：2018-05-30

申请号：DE102017221082

申请日：2017-11-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： CHIANG CHAU FATT ,  GEISSLER CHRISTIAN ,  GOLLER BERND ,  KILGER THOMAS ,  LODERMEYER JOHANNES ,  MAIER DOMINIC ,  MUEHLBAUER FRANZ XAVER ,  NG CHEE YANG ,  SEE BENG KEH ,  STEIERT MATTHIAS ,  WAECHTER CLAUS

IPC: B81B1/00 ,  B81B7/02 ,  B81C1/00

Abstract: Ein Halbleitergehäuse umfasst einen Halbleiter-Die, der eine an einer ersten Seite des Halbleiter-Dies angeordnete Sensorstruktur aufweist, und einen ersten Port, der sich von der ersten Seite zu einer zweiten Seite des Halbleiter-Dies gegenüber der ersten Seite durch den Halbleiter-Die erstreckt, um eine Verbindung zur Außenumgebung bereitzustellen. Entsprechende Herstellungsverfahren werden ebenfalls bereitgestellt.

公开(公告)号：DE10137184B4

公开(公告)日：2007-09-06

申请号：DE10137184

申请日：2001-07-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER BERND ,  HAGEN ROBERT CHRISTIAN ,  OFNER GERALD ,  STUEMPFL CHRISTIAN ,  THUMBS JOSEF ,  WEIN STEFAN ,  WOERNER HOLGER

IPC: H01L23/12 ,  H01L23/50 ,  H01L21/56 ,  H01L21/58 ,  H01L21/60 ,  H01L21/68 ,  H01L23/31

Abstract: An electronic component with a plastic package and to a method for its production, includes a semiconductor chip. An underside of the plastic package has external contacts. The external contacts are connected to contact areas on an active upper side of the semiconductor chip by contact pillars of the semiconductor chip and wiring lines arranged on the plastic package molding compound. In this case, the contact pillars represent an electrically conducting elevation of the contact areas.

公开(公告)号：DE102004025658A1

公开(公告)日：2005-12-29

申请号：DE102004025658

申请日：2004-05-26

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STADLER WOLFGANG ,  ERTLE WERNER ,  GOLLER BERND ,  HORN MICHAEL ,  HERMANN MANFRED ,  MICCOLI GIUSEPPE

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/50 ,  H01L23/62

Abstract: A semiconductor circuit containing a pad for electrical bonding of the semiconductor circuit and a metal arrangement disposed beneath the pad. The metal arrangement is in a metal layer of the semiconductor circuit located closest to the pad and is electrically insulated from the pad and from a strip conductor located beneath the metal arrangement. More than one metal layer can contain a metal arrangement. Each metal arrangement is a full-area plate that overlaps all edges of the pad or has a regular structure of small square plates. If adjacent metal arrangements are constructed from small plates, the plates in one metal arrangement overlap to cover gaps in the other metal arrangement.