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    METHOD FOR PRODUCING A THINNED DOWN STACK OF CHIPS
    1.
    发明申请
    METHOD FOR PRODUCING A THINNED DOWN STACK OF CHIPS 审中-公开
    生产工艺变薄奇普·斯塔克

    公开(公告)号：WO2004034459A3

    公开(公告)日：2005-02-17

    申请号：PCT/DE0303255

    申请日：2003-09-30

    Applicant: INFINEON TECHNOLOGIES AG ,  JANKA STEPHAN ,  MUELLER JOCHEN

    Inventor： JANKA STEPHAN ,  MUELLER JOCHEN

    IPC: H01L21/98 ,  H01L25/065 ,  H01L21/56 ,  H01L21/60

    CPC classification number: H01L25/50 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2225/06524 ,  H01L2924/00014 ,  H01L2224/0401

    Abstract: According to the invention, a first semiconductor chip (1) and a second semiconductor chip (20) are interconnected face to face on a bonding surface (4). Free regions of the upper side of the first semiconductor chip (1) facing the second semiconductor chip (20) are covered with a planarisation layer (50), such that the rear side of the second semiconductor chip (20) is levelled out. The stack of chips is then simultaneously thinned down such that the entire thickness does not exceed the dimension suitable for the respective use. Contact surfaces (3) of the first semiconductor chip (1) can be outwardly contacted by contact holes (6) in the thinned down planarisation layer (50).

    Abstract translation: 的第一半导体芯片（1）和第二半导体芯片（20），面 - 面在相互连接的接合表面（4）。 从而剩余的面向第一半导体芯片（1）的上表面上的第二半导体芯片（20）的自由部分被覆盖有平坦化层（50），使得所述第二半导体芯片（20）的背面被调平。 芯片堆叠，然后均匀地变薄，以使总厚度不超过相应的应用合适的尺寸。 通过在薄壁平坦化层（50）接触孔（6）接触的区域（3）的第一半导体芯片（1）从外部向接触。

    3.
    发明专利
    未知

    公开(公告)号：DE102005013500A1

    公开(公告)日：2006-10-05

    申请号：DE102005013500

    申请日：2005-03-23

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： PUESCHNER FRANK ,  JANKA STEPHAN ,  HEINEMANN ERIK

    IPC: H01L23/28

    Abstract: The device has a semiconductor chip (1) including an integrated circuit (1a) that is electrically connected to a contact unit (3) and a passivation layer (4) that covers the integrated circuit and through which the contact unit passes. A passivation edge protection (5) covers an edge part (6) on a chip surface. The edge part is not occupied by the integrated circuit and extends between the integrated circuit and an outer edge of the chip. An independent claim is also included for a method for producing a semiconductor device.

    DISPOSITIF A SEMI-CONDUCTEUR ET SON PROCEDE DE PRODUCTION.
    5.
    发明专利
    DISPOSITIF A SEMI-CONDUCTEUR ET SON PROCEDE DE PRODUCTION. 未知

    公开(公告)号：FR2883660A1

    公开(公告)日：2006-09-29

    申请号：FR0602199

    申请日：2006-03-14

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： PUSCHNER FRANK ,  HEINEMANN ERIK ,  JANKA STEPHAN

    IPC: H01L23/31 ,  G06K19/077

    Abstract: Procédé de production d'un dispositif à semi-conducteur, caractérisé en ce queon forme un circuit intégré sur une surface d'une puce à semi-conducteur,on dépose sur la surface une couche métallique qui est constituée de plusieurs zones partielles et qui ne recouvre pas complètement la surface de la puce à semi-conducteur,on dépose ensuite une couche de passivation ayant au moins une ouverture,on forme par l'ouverture un élément de contact qui dépasse la couche de passivation et qui est relié électriquement à l'une des zones partielles et on forme une protection de bord sur une partie de bord à la surface comprise entre le circuit intégré et l'arête extérieure de la puce à semi-conducteur.

    6.
    发明专利
    未知

    公开(公告)号：FR2855891B1

    公开(公告)日：2006-06-23

    申请号：FR0403977

    申请日：2004-04-16

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： PUSCHNER FRANK ,  MULLER JOCHEN ,  SCHINDLER WOLFGANG ,  JANKA STEPHAN

    IPC: G06K19/077 ,  H01L23/49 ,  H01L23/498

    Abstract: The module has a chip (1) fixed on a support (2) using glue (6). Contact surfaces (4) formed at a side of the support are electrically connected to the chip by a wire link (3). Raised contacts (8) are formed on contact points of the chip, where the points are arranged along a single line and the contacts act as contact surface for the link. The link is arranged on the raised contacts with a loop.

    8.
    发明专利
    未知

    公开(公告)号：DE10325566A1

    公开(公告)日：2005-01-13

    申请号：DE10325566

    申请日：2003-06-05

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： MUELLER JOCHEN ,  JANKA STEPHAN ,  PUESCHNER FRANK ,  SCHINDLER WOLFGANG

    IPC: G06K19/077 ,  H01L23/498

    Abstract: The module has a chip (1) fixed on a support (2) using glue (6). Contact surfaces (4) formed at a side of the support are electrically connected to the chip by a wire link (3). Raised contacts (8) are formed on contact points of the chip, where the points are arranged along a single line and the contacts act as contact surface for the link. The link is arranged on the raised contacts with a loop.

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