公开(公告)号：DE59912917D1

公开(公告)日：2006-01-19

申请号：DE59912917

申请日：1999-09-01

Applicant: INFINEON TECHNOLOGIES AG

Inventor： LE THOAI-THAI ,  BROX DR ,  LINDOLF DR ,  BRASS DR

IPC: G11C11/407 ,  G11C5/14 ,  G11C8/00 ,  G11C8/08 ,  G11C11/401

Abstract: An integrated semiconductor storage device includes a number of memory or storage cells (13-15) arranged in at least two sections (1-4) of which each section is supplied by a supply potential (at 12,22,32,42). A supply voltage source (10,20,30,40) is provided for each of the sections, and a decoder (5) provides an output signal for each of the sections (1) for activating and deactivating the respective section (1) for memory storage access. The supply voltage sources (10) are controlled so that the supply potential is made available with higher driver capability for one of the sections (1), when this section (1) is activated by the respective output signal (A11), and with lower driver capability when this section is deactivated by the respective output signal (A11).

公开(公告)号：DE50105160D1

公开(公告)日：2005-03-03

申请号：DE50105160

申请日：2001-02-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： AYADI DR ,  LINDOLF DR ,  OEZOGUZ-GEISSLER NEDIM

IPC: G01R31/28 ,  G01R31/316 ,  G11C29/50

公开(公告)号：DE59902403D1

公开(公告)日：2002-09-26

申请号：DE59902403

申请日：1999-09-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： LE THOAI-THAI ,  LINDOLF DR ,  SCHNEIDER HELMUT

IPC: G11C7/06 ,  G11C7/08 ,  G11C8/08 ,  G11C8/18 ,  G11C11/409 ,  G11C11/4091 ,  H01L27/105 ,  H01L27/108