-
公开(公告)号：DE10218787B3
公开(公告)日：2004-01-29
申请号：DE10218787
申请日：2002-04-26
Applicant: INFINEON TECHNOLOGIES AG
Inventor： MAYER PETER
Abstract: A system and a method for functionally testing fast semiconductor memory chips. The data shifting method proposed here is based on the fact that a low speed tester writes data and data strobe test patterns to a memory block with a low clock frequency. The connection between the tester and the memory chip is subsequently disconnected for all the data and data strobe lines. This can be done by a relay or integrated circuits on an external circuit board or by test modes in the output circuit of the memory chip, that is to say on-chip. The data and data strobe lights are subsequently divided into two groups of the same size and connected to one another. The data and data strobe test pattern written to the first memory block is then shifted with a high clock frequency into a second memory block, from where it is then shifted back into the first memory block in a further read-write cycle with the high clock frequency. The data pattern can subsequently be read out with a low clock frequency by the low speed tester and evaluated.
-
公开(公告)号：DE10323413B4
公开(公告)日：2006-01-19
申请号：DE10323413
申请日：2003-05-23
Applicant: INFINEON TECHNOLOGIES AG
Inventor： HERRMANN KONRAD , SCHELLINGER ANDREAS , MAYER PETER , ROHLEDER MARKUS
IPC: G01R31/3181 , G01R31/319 , G11C29/00 , G11C29/56
Abstract: Test method for testing high speed semiconductor memory (1), especially DDR-DRAM modules using a test device (4) and a memory control unit. A test signal bus (51') is used to link a test signal unit (41') with the test device. The test signal unit is provided by a memory control unit or a simplified memory control unit derived from a memory control unit and is integrated in the test socket (2'). Independent claims are also included for the following:- (a) a test arrangement for testing semiconductor memory circuits and; (b) a test socket for testing semiconductor memory in conjunction with a memory control unit.
-
公开(公告)号：DE10319516A1
公开(公告)日：2004-12-09
申请号：DE10319516
申请日：2003-04-30
Applicant: INFINEON TECHNOLOGIES AG
Inventor： HERRMANN KONRAD , SCHELLINGER ANDREAS , MAYER PETER , ROHLEDER MARKUS
Abstract: Test method for semiconductor memory modules, especially high speed DDR-DRAMS, that are operated in conjunction with a memory control unit. According to the method a number of suitable memory control units are selected as test memory control units (44) and are provided as part of a test device (3). The test data signals given out from the semiconductor memory modules under test are evaluated using the test memory control units. An independent claim is made for a test device for semiconductor memory modules.
-
公开(公告)号：DE10125798B4
公开(公告)日：2006-01-19
申请号：DE10125798
申请日：2001-05-26
Applicant: INFINEON TECHNOLOGIES AG
Inventor： MARX THILO , DIETRICH STEFAN , MAYER PETER , DOBLER MANFRED
Abstract: The imaging system provides assistance during the positioning of a measuring tip as it is placed onto a contact region of a microchip, in order to measure an on-chip signal. The contact region is imaged in a magnified fashion. An insertion device is provided that is suitable for providing a display of the on-chip signal in the imaging plane.
-
Patent Agency Ranking
公开(公告)号：DE10323413A1
公开(公告)日：2004-12-23
申请号：DE10323413
申请日：2003-05-23
Applicant: INFINEON TECHNOLOGIES AG
Inventor： HERRMANN KONRAD , SCHELLINGER ANDREAS , MAYER PETER , ROHLEDER MARKUS
IPC: G01R31/319 , G11C29/56 , G11C29/00 , G01R31/3181
Abstract: Test method for testing high speed semiconductor memory (1), especially DDR-DRAM modules using a test device (4) and a memory control unit. A test signal bus (51') is used to link a test signal unit (41') with the test device. The test signal unit is provided by a memory control unit or a simplified memory control unit derived from a memory control unit and is integrated in the test socket (2'). Independent claims are also included for the following:- (a) a test arrangement for testing semiconductor memory circuits and; (b) a test socket for testing semiconductor memory in conjunction with a memory control unit.
-
公开(公告)号：DE10232178B3
公开(公告)日：2004-02-26
申请号：DE10232178
申请日：2002-07-16
Applicant: INFINEON TECHNOLOGIES AG
Inventor： ROHLEDER MARKUS , WELLER JOERG , MAYER PETER , GREWE MATTHIAS
IPC: G11C29/02 , G11C29/20 , G01R31/3187 , G11C29/00
Abstract: The checking device has a memory device (FF) with a number of memory elements (FF0-FF3) respectively storing the values of address signals supplied by the address generator (AGen) to the lines (B0-B3) of an address bus (A0-A3) of the IC, the stored values delivered to at least one terminal position (pd) of the IC via a controlled switch (T). An Independent claim for a checking method for an address generator forming part of a testing device within an IC is also included.
-
公开(公告)号：DE10211136C1
公开(公告)日：2003-07-24
申请号：DE10211136
申请日：2002-03-14
Applicant: INFINEON TECHNOLOGIES AG
Inventor： MAYER PETER , DIETRICH STEFAN , RETTENBERGER ARMIN , GREWE MATTHIAS
Abstract: The test method has an information written into the memory cell device (M1,M2) of the electronic module (B) at a first clock frequency and read out from the memory cell device at a second clock frequency, with re-write-in of a reflected information obtained at a reflection point (R) using the second clock frequency and read out of the information at the first clock frequency. An Independent claim for a test device for an electronic module is also included.
-
公开(公告)号：DE10104575A1
公开(公告)日：2002-08-29
申请号：DE10104575
申请日：2001-02-01
Applicant: INFINEON TECHNOLOGIES AG
Inventor： DOBLER MANFRED , MAYER PETER , RETTENBERGER ARMIN , DONHAUSER JUERGEN , SCHELLINGER ANDREAS
Abstract: The method involves measuring and evaluating a data signal (DQx) and a data reference signal (DQS), which is switched into the active state (A) by the memory when a memory access occurs during an access cycle, in parallel. The process runs in a tester connected to the memory outputs for the data signal and the data reference signal.
-
公开(公告)号：DE10125798A1
公开(公告)日：2002-12-12
申请号：DE10125798
申请日：2001-05-26
Applicant: INFINEON TECHNOLOGIES AG
Inventor： MARX THILO , DIETRICH STEFAN , MAYER PETER , DOBLER MANFRED
Abstract: The imaging system provides assistance during the positioning of a measuring tip as it is placed onto a contact region of a microchip, in order to measure an on-chip signal. The contact region is imaged in a magnified fashion. An insertion device is provided that is suitable for providing a display of the on-chip signal in the imaging plane.
-
-
-
-
-
-
-
-
Search Results
9
records
(took 0.022 seconds)
