7.
    发明专利
    未知

    公开(公告)号:DE10259300B4

    公开(公告)日:2004-10-07

    申请号:DE10259300

    申请日:2002-12-18

    Abstract: Semiconductor component testing method, especially for testing stacked chip modules, has the following steps: writing of a first value to a memory cell of a first semiconductor component; writing of a different value to a memory cell of a second semiconductor component and simultaneous application of a first valve corresponding to the first signal to a pin of the first component and a second value corresponding to the second signal to a pin of the second component. The invention also relates to a corresponding semiconductor test unit and test system.

    8.
    发明专利
    未知

    公开(公告)号:DE10130785C2

    公开(公告)日:2003-04-30

    申请号:DE10130785

    申请日:2001-06-26

    Abstract: The present invention provides a memory chip ( 100 ) which can be operated in a normal mode and in a test mode (TM) and which has a device ( 102 ) for outputting data from the memory chip ( 100 ) and a device ( 104 ) for enabling the device ( 102 ) for outputting data when the test mode (TM) has been activated. The device ( 104 ) for enabling the device ( 102 ) for outputting data has a device for masking data so that only particular portions of the data are output when a data masking state (DQM) has been activated.

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