公开(公告)号：DE19528991C2

公开(公告)日：2002-05-16

申请号：DE19528991

申请日：1995-08-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PLASA GUNTHER

IPC: H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/32

Abstract: A method for producing a memory cell includes masking a desired polysilicon structure with an oxidation-inhibiting layer, preferably a nitride layer. The polysilicon above source/drain regions and field regions is then converted into silicon dioxide. At the same time, filling with silicon dioxide is effected between adjacent polysilicon paths. The field oxide thickness is increased by the conversion of polysilicon in the field regions as well. A second polysilicon layer is applied over a field region, with inclusion of the oxidation-inhibiting layer present there. One electrode of a capacitor is produced therefrom through the use of marking and etching, with the first polysilicon situated under the oxidation-inhibiting layer forming another electrode and the oxidation-inhibiting layer forming a dielectric. The structure provides a less complex masking and etching technique as well as improved reliability of the components.

公开(公告)号：DE59609433D1

公开(公告)日：2002-08-14

申请号：DE59609433

申请日：1996-08-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PLASA GUNTHER

IPC: H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: A method for producing a memory cell includes masking a desired polysilicon structure with an oxidation-inhibiting layer, preferably a nitride layer. The polysilicon above source/drain regions and field regions is then converted into silicon dioxide. At the same time, filling with silicon dioxide is effected between adjacent polysilicon paths. The field oxide thickness is increased by the conversion of polysilicon in the field regions as well. A second polysilicon layer is applied over a field region, with inclusion of the oxidation-inhibiting layer present there. One electrode of a capacitor is produced therefrom through the use of marking and etching, with the first polysilicon situated under the oxidation-inhibiting layer forming another electrode and the oxidation-inhibiting layer forming a dielectric. The structure provides a less complex masking and etching technique as well as improved reliability of the components.

公开(公告)号：BR9915241A

公开(公告)日：2001-07-24

申请号：BR9915241

申请日：1999-11-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BRAUN HELGA ,  KAKOSCHKE RONALD ,  STOKAN REGINA ,  PLASA GUNTHER ,  KUX ANDREAS

IPC: H01L23/52 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/8238 ,  H01L23/58 ,  H01L27/092 ,  H01L27/02

Abstract: A method for fabricating a wiring which runs at least piecewise in a substrate. At least one conductive connection runs in the semiconductor substrate and at least one conductive connection runs on the semiconductor substrate being provided. The semiconductor component enables applications in which high security against external manipulations is important.

公开(公告)号：DE59914740D1

公开(公告)日：2008-06-05

申请号：DE59914740

申请日：1999-11-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BRAUN HELGA ,  KAKOSCHKE RONALD ,  STOKAN REGINA ,  PLASA GUNTHER ,  KUX ANDREAS

IPC: H01L23/52 ,  H01L27/02 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/8238 ,  H01L23/58 ,  H01L27/092

Abstract: A method for fabricating a wiring which runs at least piecewise in a substrate. At least one conductive connection runs in the semiconductor substrate and at least one conductive connection runs on the semiconductor substrate being provided. The semiconductor component enables applications in which high security against external manipulations is important.

公开(公告)号：AT393476T

公开(公告)日：2008-05-15

申请号：AT99963216

申请日：1999-11-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BRAUN HELGA ,  KAKOSCHKE RONALD ,  STOKAN REGINA ,  PLASA GUNTHER ,  KUX ANDREAS

IPC: H01L23/52 ,  H01L27/02 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/8238 ,  H01L23/58 ,  H01L27/092

Abstract: A method for fabricating a wiring which runs at least piecewise in a substrate. At least one conductive connection runs in the semiconductor substrate and at least one conductive connection runs on the semiconductor substrate being provided. The semiconductor component enables applications in which high security against external manipulations is important.

公开(公告)号：DE59903868D1

公开(公告)日：2003-01-30

申请号：DE59903868

申请日：1999-09-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WEBER WERNER ,  THEWES ROLAND ,  PLASA GUNTHER

IPC: G11C11/14 ,  G11C11/15 ,  G11C11/16 ,  H01F10/08 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/22 ,  H01L43/08

Abstract: The magnetoresistive memory provides for an improvement in interference immunity even though only a small chip area is used. Word lines are situated vertically between two complementary bit lines, a magnetoresistive memory system of a regular location is situated between a bit line and a word line, and an appertaining magnetoresistive layer system of a complementary memory location is situated between the complementary bit line and the word line in the vertical direction.

公开(公告)号：DE19852072C2

公开(公告)日：2001-10-18

申请号：DE19852072

申请日：1998-11-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BRAUN HELGA ,  KAKOSCHKE RONALD ,  KUX ANDREAS ,  STOKAN REGINA ,  PLASA GUNTHER

IPC: H01L23/52 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/8238 ,  H01L23/58 ,  H01L27/092 ,  H01L21/768 ,  H01L23/535

Abstract: A method for fabricating a wiring which runs at least piecewise in a substrate. At least one conductive connection runs in the semiconductor substrate and at least one conductive connection runs on the semiconductor substrate being provided. The semiconductor component enables applications in which high security against external manipulations is important.