公开(公告)号：FR2879012B1

公开(公告)日：2009-02-27

申请号：FR0509846

申请日：2005-09-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHEIBLHOFER DIETMAR ,  JERNEJ JURGEN

IPC: G11C5/14 ,  G06K19/07 ,  G11C8/12

公开(公告)号：DE102006061704B3

公开(公告)日：2008-03-27

申请号：DE102006061704

申请日：2006-12-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAID JOSEF ,  SCHEIBLHOFER DIETMAR ,  LEUTGEB THOMAS ,  ZIMEK BERND

IPC: G06F1/32 ,  G06F1/08

Abstract: The method involves providing an operating frequency (f) for a clock of an integrated circuit, along with connection or disconnection of a clocked digital circuit part e.g. cryptoprocessor, and changing the frequency. The frequency is reduced and increased, if the part is connected to increase a current flow of the circuit and is disconnected to reduce the flow. The increase or reduction of the frequency is made such that during connection or disconnection of the part the current flow of the entire circuit is not changing.

公开(公告)号：DE10136151C2

公开(公告)日：2003-06-05

申请号：DE10136151

申请日：2001-07-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHEIBLHOFER DIETMAR

IPC: G06F15/16

公开(公告)号：DE10142337A1

公开(公告)日：2003-03-27

申请号：DE10142337

申请日：2001-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHEIBLHOFER DIETMAR

IPC: G06F13/12 ,  H01L27/00 ,  G06F13/38 ,  H01L25/065

Abstract: An IC chip is provided with an integrated USB core and a microcontroller (AC). This is then combined with a separate physical interface, also in the form of an integrated semiconductor chip. The chips can be assembled one above the other by gluing and connected by, e,g, bond wires to form an assembly requiring no housing.

公开(公告)号：DE102009006565A1

公开(公告)日：2009-08-27

申请号：DE102009006565

申请日：2009-01-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HORVAT HELMUT ,  KARGL WALTER ,  LEUTGEB THOMAS ,  MEINDL WOLFGANG ,  RAGGAM PETER ,  SCHEIBLHOFER DIETMAR

IPC: H04L29/06

Abstract: A high frequency (HF) converter for a mobile device, having an input device configured to receive a first signal including data in accordance with a standard, non-HF communication protocol or in accordance with an HF communication protocol; a converter device coupled to the input device, the converter device configured to convert the first signal to a second signal including the data in accordance with the other of the HF communication protocol and the standard, non-HF communication protocol; and an output device configured to transmit the second signal.

公开(公告)号：DE102006041002B4

公开(公告)日：2009-01-02

申请号：DE102006041002

申请日：2006-08-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHEIBLHOFER DIETMAR ,  SMOLA MICHAEL ,  HAID JOSEF

IPC: G06F9/34

Abstract: A method for changing a succession of instruction words including providing a set of machine words, each machine word being associated with an address from a set of addresses, providing a succession of instruction words having address information, the succession of instruction words prescribing a sequence of machine words which are intended to be processed by an arithmetic and logic unit which is coupled to a buffer store, altering the association between at least a portion of the set of machine words and at least a portion of the set of addresses, changing the address information in the succession of instruction words based on the alteration of the association, storing the changed succession of instruction words in a memory, and storing the set of machine words in the memory, so that it is possible to access the machine words using the associated addresses.

公开(公告)号：FR2916061A1

公开(公告)日：2008-11-14

申请号：FR0701823

申请日：2007-03-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ENGL KORBINIAN ,  HAID JOSEF ,  SCHEIBLHOFER DIETMAR ,  WEDER UWE ,  ZIMEK BERND

IPC: G06F1/32 ,  G06F1/08

Abstract: Une variation de fréquence d'horloge d'un consommateur à fonctionnement synchronisé alimenté en énergie peut être réalisée de manière rapide et efficace avec une influence aussi faible que possible de l'alimentation d'énergie alimentant le consommateur lorsque la variation de cycle d'horloge totale a lieu par une pluralité de variations de cycle d'horloge individuelles avec, chacune, des quantités de variation différentes, donc lorsque la fréquence d'horloge est modifiée de manière non linéaire.

公开(公告)号：DE102006012654B4

公开(公告)日：2008-02-07

申请号：DE102006012654

申请日：2006-03-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAID JOSEF ,  ZIMEK BERND ,  SCHEIBLHOFER DIETMAR ,  WEDER UWE ,  ENGL KORBINIAN

IPC: G06F1/32 ,  G06F1/08

Abstract: The controller has a frequency indicator (16) and a clock generator (18), which is connected with a clock-operated load (12). The clock generator generates a system clock, which is necessary for operating the clock-operated load. The controller is designed to implement a total variation of actual-frequency to a reference frequency in such a manner that the total variation is obtained by number of cycle changes. The controller is designed to determine amount of changes corresponding to the actual-frequency. An independent claim is also included for a method for varying a clock frequency of a clocked operating load.

公开(公告)号：FR2875964A1

公开(公告)日：2006-03-31

申请号：FR0509845

申请日：2005-09-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHEIBLHOFER DIETMAR

IPC: H02J9/00 ,  H02J7/00 ,  H04M1/725

Abstract: Dans ce dispositif d'alimentation en tension, il est prévu, outre un premier moyen (15) d'application d'une tension d'alimentation, dans certains cas un deuxième moyen (13) constitué de manière à mettre à disposition indépendamment de la valeur de seuil une deuxième tension d'alimentation pour le fonctionnement d'une interface (3) sans contact.

公开(公告)号：DE10303453B3

公开(公告)日：2004-08-19

申请号：DE10303453

申请日：2003-01-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHEIBLHOFER DIETMAR

IPC: G06K9/00 ,  G06K9/52

Abstract: The invention relates to a method for evaluating biometric data, according to which data that has been captured via a sensor device by sensor elements is fed to an evaluation device in the form of line-based data records. According to the invention, the evaluation device generates a first image data record containing the relevant digitised image information of said first data record and saves the data record as a reference data record to a memory unit and generates at least one additional image data record containing the relevant digitised image information of this second data record and compares the latter to the first data record for a match. The evaluation device then generates a differential of the pixels of the first and additional image data record as a differential data record and saves said record.