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公开(公告)号:JP2007129185A
公开(公告)日:2007-05-24
申请号:JP2006144053
申请日:2006-05-24
Applicant: Infineon Technologies Ag , インフィネオン テクノロジーズ アクチエンゲゼルシャフト
Inventor: SCHUSTER JOSEF
CPC classification number: H05K1/181 , G11C5/00 , H01L2924/0002 , H05K2201/09409 , H05K2201/097 , Y02P70/611 , Y10T29/49133 , H01L2924/00
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor memory module capable of arranging even long rectangular semiconductor memory chips in perpendicular direction and two trains. SOLUTION: Two adjacent horizontal trains of the module including a plurality of same type semiconductor chips 3 are formed between a center of printed circuit board 2 and each second edge 9. In the horizontal trains, the semiconductor memory chips 3 are perpendicularly arranged each other along y axis direction. In each adjacent horizontal train, the semiconductor memory chips 3 are packaged so that they may be adjacent each other along x axis direction. The semiconductor memory chips 3 in one side and the other side of adjacent horizontal trains are prepared in such a manner that different length sides are arranged in reciprocative manner, and have sides parallel to a contact strip 11 simultaneously. One side between two semiconductor memory chips 3 arranged at a location where they face each other in the y axis direction is parallel to the contact strip 11 in its short side, and the other side is parallel to the contact strip 11 in its long side. COPYRIGHT: (C)2007,JPO&INPIT
Abstract translation: 要解决的问题:提供一种能够在垂直方向和两列火车上布置甚至长矩形半导体存储器芯片的半导体存储器模块。 解决方案:在印刷电路板2的中心和每个第二边缘9之间形成包括多个相同类型的半导体芯片3的两个相邻的水平列车。在水平列车中,半导体存储器芯片3垂直布置 彼此沿y轴方向。 在每个相邻的水平排列中,半导体存储器芯片3被封装,使得它们可以沿x轴方向彼此相邻。 半导体存储芯片3在相邻的水平列的一侧和另一侧是以不同长度的侧面以往复方式布置的方式制备的,并且具有与接触片11同时平行的侧面。 布置在它们在y轴方向上彼此面对的位置的两个半导体存储器芯片3之间的一侧在其短边平行于接触条11,另一侧在其长边平行于接触条11。 版权所有(C)2007,JPO&INPIT
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公开(公告)号:DE102005060081B4
公开(公告)日:2007-08-30
申请号:DE102005060081
申请日:2005-12-15
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHUSTER JOSEF
IPC: H01L23/50 , G11C5/00 , H01L23/66 , H01L25/065 , H05K7/20
Abstract: The component has a printed circuit board (2) with semiconductor components (11, 12) e.g. chips, which are arranged on two main surfaces (2a, 2b) of the printed circuit board. Each semiconductor component has an outer surface that faces the printed circuit board and extends from an edge of the components to an opposite edge of the components. Each semiconductor component has a group of contact connections (6, 7), which is provided in an area of the outer surface, where one of the connections comes for congruence with the other connection in a direction parallel to the main surfaces. An independent claim is also included for a method for manufacturing an electronic component.
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公开(公告)号:DE102005051998B3
公开(公告)日:2007-01-11
申请号:DE102005051998
申请日:2005-10-31
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHUSTER JOSEF
Abstract: A semiconductor memory module comprises an electronic printed circuit board having many similar memory chips (3) on the surface and an edge (10) contact strip (11) with a row of contacts and two neighboring rows of similar rectangular chips of shorter (a) and longer (b) dimensions above one another. The chips in one set have their shorter measurement parallel to the contact strip while those of the other set have their longer measurement parallel to the contact strip.
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公开(公告)号:DE102004021226A1
公开(公告)日:2005-11-24
申请号:DE102004021226
申请日:2004-04-30
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHUSTER JOSEF
Abstract: Semiconductor circuit chips (1-4) are divided into groups on a circuit board (10) and lie beside each other along the x and y directions, the groups having different alignments to the plane of the circuit board. The first alignment (alpha) is rotated by 180 degrees w.r.t. the second alignment (beta), so that each branch (Z1,Z2) of the signal-line ends leading to the first and second group (G1,G2) of semiconductor chips lie in the y-direction. An independent claim is included for a method of manufacturing a semiconductor circuit module.
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公开(公告)号:DE102005051497B3
公开(公告)日:2006-12-07
申请号:DE102005051497
申请日:2005-10-26
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHUSTER JOSEF , MUFF SIMON , RAGHURAM SIVA , BACHA ABDALLAH
IPC: H01L25/10 , G11C5/06 , H01L23/498 , H05K1/18
Abstract: The module has multiple semiconductor chips (1-9) mounted on an outer surface of a printed circuit board. A group of five semiconductor chips (1-5) is arranged between another group of four semiconductor chips (6-9) and a center of the circuit board. The two groups of the chips are connected by two separate line buses (L1, L2), respectively, where conducting paths of the buses branch out to all semiconductor chips of the groups.
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公开(公告)号:DE102005060081A1
公开(公告)日:2007-06-28
申请号:DE102005060081
申请日:2005-12-15
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHUSTER JOSEF
IPC: H01L23/50 , G11C5/00 , H01L23/66 , H01L25/065 , H05K7/20
Abstract: The component has a printed circuit board (2) with semiconductor components (11, 12) e.g. chips, which are arranged on two main surfaces (2a, 2b) of the printed circuit board. Each semiconductor component has an outer surface that faces the printed circuit board and extends from an edge of the components to an opposite edge of the components. Each semiconductor component has a group of contact connections (6, 7), which is provided in an area of the outer surface, where one of the connections comes for congruence with the other connection in a direction parallel to the main surfaces. An independent claim is also included for a method for manufacturing an electronic component.
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公开(公告)号:DE10339890A1
公开(公告)日:2005-03-31
申请号:DE10339890
申请日:2003-08-29
Applicant: INFINEON TECHNOLOGIES AG
Inventor: NEUGEBAUER SOEREN , SCHOBER MARTIN , SCHUSTER JOSEF
IPC: H01L23/31 , H01L23/498 , H01L25/065 , H01L25/10 , H01L23/50 , H01L21/66
Abstract: A second connection surface (5) is located above the uppermost surface of the packaged semiconductor (1), which faces away from the circuit board (2). The surface (5) is separated from the semiconductor by insulant (6, 7). The surface (5) has electrical connections with the first connection- (ball grid array-) surface (3) below.
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