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Patent Agency Ranking
公开(公告)号：DE102005055185A1
公开(公告)日：2006-06-08
申请号：DE102005055185
申请日：2005-11-18
Applicant: INFINEON TECHNOLOGIES AG
Inventor： RUCKERBAUER HERMANN , BACHA ABDALLAH , SICHERT CHRISTIAN , SAVIGNAC DOMINIQUE , GREGORIUS PETER , WALLNER PAUL
IPC: G11C7/22
Abstract: A semiconductor memory module includes a plurality of semiconductor memory chips and bus signal lines that supply an incoming clock signal and incoming command and address signals to the semiconductor memory chips. A clock signal regeneration circuit and a register circuit are arranged on the semiconductor memory module in a common chip packing connected to the bus signal lines. The clock signal regeneration circuit and the register circuit respectively condition the incoming clock signal and temporarily store the incoming command and address signals, respectively multiply the conditioned clock signal and the temporarily stored command and address signals by a factor of 1:X, and respectively supply to the semiconductor memory chips the conditioned clock signal and the temporarily stored command and address signals.
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公开(公告)号：DE60308637T2
公开(公告)日：2007-08-09
申请号：DE60308637
申请日：2003-03-11
Applicant: INFINEON TECHNOLOGIES AG
Inventor： KUZMENKA MAKSIM , CHENNUPATI SIVA RAGHURAM , BACHA ABDALLAH , MUFF SIMON
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公开(公告)号：DE10305116A1
公开(公告)日：2004-08-26
申请号：DE10305116
申请日：2003-02-07
Applicant: INFINEON TECHNOLOGIES AG
Inventor： MUFF SIMON , BACHA ABDALLAH
IPC: G01R31/28 , G01R31/30 , G01R31/317 , G01R31/3193 , G11C29/00 , H01L21/66
Abstract: A conductive pattern (1) is integrated on the semiconductor module (M) and connected to a solder terminal (2). The conductive pattern is mounted with passive components (R1,R2,R3,L,C1,C2), specially selected to form a dummy-load circuit which outputs specific time signals to the pin of the mounted semiconductor chip. The signals are used as a time reference for measurements made on the mounted chip.
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公开(公告)号：DE102005051497B3
公开(公告)日：2006-12-07
申请号：DE102005051497
申请日：2005-10-26
Applicant: INFINEON TECHNOLOGIES AG
Inventor： SCHUSTER JOSEF , MUFF SIMON , RAGHURAM SIVA , BACHA ABDALLAH
IPC: H01L25/10 , G11C5/06 , H01L23/498 , H05K1/18
Abstract: The module has multiple semiconductor chips (1-9) mounted on an outer surface of a printed circuit board. A group of five semiconductor chips (1-5) is arranged between another group of four semiconductor chips (6-9) and a center of the circuit board. The two groups of the chips are connected by two separate line buses (L1, L2), respectively, where conducting paths of the buses branch out to all semiconductor chips of the groups.
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公开(公告)号：DE60308637D1
公开(公告)日：2006-11-09
申请号：DE60308637
申请日：2003-03-11
Applicant: INFINEON TECHNOLOGIES AG
Inventor： KUZMENKA MAKSIM , CHENNUPATI SIVA RAGHURAM , BACHA ABDALLAH , MUFF SIMON
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