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    METHOD FOR DEPOSITING A CONDUCTIVE MATERIAL ON A SUBSTRATE, AND SEMICONDUCTOR CONTACT DEVICE
    2.
    发明申请
    METHOD FOR DEPOSITING A CONDUCTIVE MATERIAL ON A SUBSTRATE, AND SEMICONDUCTOR CONTACT DEVICE 审中-公开
    处理对导电材料上的基板及半导体装置的触点断开

    公开(公告)号：WO2005033358A3

    公开(公告)日：2005-07-21

    申请号：PCT/EP2004010892

    申请日：2004-09-29

    Applicant: INFINEON TECHNOLOGIES AG ,  GUTSCHE MARTIN ,  KREUPL FRANZ ,  PAMLER WERNER ,  SEIDEL ROBERT

    Inventor： GUTSCHE MARTIN ,  KREUPL FRANZ ,  PAMLER WERNER ,  SEIDEL ROBERT

    IPC: C23C16/02 ,  C23C16/04 ,  C23C16/26 ,  C23C16/44 ,  C23C16/455 ,  H01L21/3205

    CPC classification number: C23C16/0209 ,  C23C16/045 ,  C23C16/26 ,  C23C16/45557

    Abstract: The invention relates to a method for depositing a carbon material (17) in or on a substrate (14). Said method comprises the following steps: the inside (10') of a processing chamber (10) is heated to a pre-determined temperature; the substrate (14) is introduced into the processing chamber (10); the air in the processing chamber (10) is evacuated until a pre-determined pressure or a lower pressure is reached; a gas (12) containing at least carbon is introduced until a second pre-determined pressure is reached, that is higher than the first pre-determined pressure; and the carbon material (17) is deposited on a surface or in a recess (15), from the gas (12) containing carbon. The invention also relates to a semiconductor contact device.

    Abstract translation: 本发明提供了用于在或基板（14）上沉积的碳材料（17），其包括以下步骤的方法：处理室（10）加热的内部空间（10“）到预定的温度; 放置在处理室中的基板（14）（10）; 抽空所述处理室（10）到第一预定压力或更低; 引入气体（12），其具有至少碳，​​直到达到第二预定压力，其比第一预定压力更高; 和沉积所述碳材料（17）上的表面上或在从含碳气体（12）的凹部（15）。 本发明还提供了一种半导体接触装置。

    5.
    发明专利
    未知

    公开(公告)号：DE102004001340A1

    公开(公告)日：2005-08-04

    申请号：DE102004001340

    申请日：2004-01-08

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： SEIDEL ROBERT ,  KREUPL FRANZ

    IPC: B82B3/00 ,  H01L21/336 ,  H01L29/06 ,  H01L29/78 ,  H01L51/05 ,  H01L51/30 ,  H01L51/40

    Abstract: A nanoelement field effect transistor includes a nanotube disposed on the substrate. A first source/drain region is coupled to a first end portion of the nanoelement and a second source/drain region is coupled to a second end portion of the nanoelement. A recess in a surface region of the substrate is arranged in such a manner that a region of the nanoelement arranged between the first and second end portions is taken out over the entire periphery of the nanoelement. A gate-insulating structure covers the periphery of the nanoelement and a gate structure covers the periphery of the gate-insulating structure.

    6.
    发明专利
    未知

    公开(公告)号：DE10307815B3

    公开(公告)日：2004-11-11

    申请号：DE10307815

    申请日：2003-02-24

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： SEIDEL ROBERT ,  KREUPL FRANZ ,  GRAHAM ANDREW

    IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  B82B3/00

    Abstract: An integrated electronic component having a substrate, a metal multilayer system, which is arranged at least on regions of the substrate, and a nonconductive layer, which is arranged on the metal multilayer system and has at least one contact hole, in which at least one carbon nanotube is grown on the metal multilayer system at the bottom of the contact hole. The metal multilayer system includes a high-melting metal layer, a metal separating layer, a catalyst layer, and a final metal separating layer. The high-melting metal layer is composed of at least one of tantalum, molybdenum, and tungsten. The metal separating layer is composed of aluminum, gold, or silver. The catalyst layer is composed of at least one of iron, cobalt, nickel, yttrium, titanium, platinum, and palladium, and a combination thereof. The final metal separating layer, which is arranged above the catalyst layer, is composed of aluminum.

    7.
    发明专利
    未知

    公开(公告)号：DE102004003374A1

    公开(公告)日：2005-08-25

    申请号：DE102004003374

    申请日：2004-01-22

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： KREUPL FRANZ ,  SEIDEL ROBERT

    IPC: B82B1/00 ,  H01L21/335 ,  H01L29/06 ,  H01L29/12 ,  H01L29/16 ,  H01L29/775 ,  H01L29/78 ,  H01L51/30 ,  H01L21/336

    Abstract: A semiconductor power switch and method is disclosed. In one Embodiment, the semiconductor power switch has a source contact, a drain contact, a semiconductor structure which is provided between the source contact and the drain contact, and a gate which can be used to control a current flow through the semiconductor structure between the source contact and the drain contact. The semiconductor structure has a plurality of nanowires which are connected in parallel and are arranged in such a manner that each nanowire forms an electrical connection between the source contact and the drain contact.

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