公开(公告)号：WO02073668A2

公开(公告)日：2002-09-19

申请号：PCT/US0208009

申请日：2002-03-13

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： RANADE RAJIV ,  NAEEM MUNIR ,  MATHAD GANGADHARA

IPC: H01L21/3065 ,  H01L21/308 ,  H01L21/8242 ,  H01L21/00

CPC classification number: H01L27/1087 ,  H01L21/3065 ,  H01L21/3081

Abstract: A method for etching trenches includes providing a patterned mask stack (8) on a substrate (50). A trench is etched in the substrate by forming a tapered-shaped trench portion (60) of the trench, which narrows with depth in the substrate by employing a first plasma chemistry mixture including O2, HBr and NF3. An extended portion (61) of the trench is formed by etching a second profile deeper and wider than the tapered-shaped trench portion in the substrate by employing a second plasma chemistry mixture including O2, HBr and SF6 or F2.

Abstract translation: 蚀刻沟槽的方法包括在衬底（50）上提供图案化掩模叠层（8）。 通过形成沟槽的锥形沟槽部分（60），通过采用包括O 2，HBr和NF 3的第一等离子体化学混合物在衬底中的深度变窄来在衬底中蚀刻沟槽。 通过使用包括O 2，HBr和SF 6或F 2的第二等离子体化学混合物，通过蚀刻比衬底中的锥形沟槽部分更深和更宽的第二分布来形成沟槽的延伸部分（61）。

公开(公告)号：DE10310080A1

公开(公告)日：2003-10-02

申请号：DE10310080

申请日：2003-03-07

Applicant: INFINEON TECHNOLOGIES AG ,  IBM

Inventor： CHAN KEVIN ,  KULKARNI SUBHASH ,  MATHAD GANGADHARA ,  RANADE RAIJV M

IPC: H01L21/308 ,  H01L21/762 ,  H01L21/768 ,  H01L21/8242 ,  H01L21/76

Abstract: Formation of at least one deep trench structure comprises providing at least one deep trench having sidewalls that extend to a common bottom wall in a substrate surface, each of the deep trenches having initial dimensions that are wider than targeted dimensions for the deep trenches; and forming an epitaxial silicon film on at least some portions of the sidewalls to reduce the initial dimensions of the deep trenches to the targeted dimensions.

公开(公告)号：DE10310080B4

公开(公告)日：2009-05-07

申请号：DE10310080

申请日：2003-03-07

Applicant: IBM ,  QIMONDA AG

Inventor： CHAN KEVIN ,  KULKARNI SUBHASH ,  MATHAD GANGADHARA ,  RANADE RAIJV M

IPC: H01L21/8242 ,  H01L21/308 ,  H01L21/76 ,  H01L21/762 ,  H01L21/768

公开(公告)号：DE10320944A1

公开(公告)日：2003-11-27

申请号：DE10320944

申请日：2003-05-09

Applicant: INFINEON TECHNOLOGIES AG ,  IBM

Inventor： MATHAD GANGADHARA ,  PANDA SIDDHARTHA ,  RANADE RAJIV

IPC: H01L21/3065 ,  H01L21/8242

Abstract: A method of fabricating a high aspect ratio deep trench in a semiconductor substrate comprising reducing the formation of a passivation film during the etching of the trench by including a first step of contacting the substrate in which the deep trench is to be formed with a fluorine poor or low concentration of a fluorine gas in the plasma of etchant gases for etching the high aspect ratio deep trench, followed by a second step of increasing the concentration of the fluorine containing gas to create a fluorine-rich plasma while lowering the chamber pressure of the reactor and RF power. Preferably, the second step is introduced periodically during the etching of a deep trench in an alternating manner.