公开(公告)号：WO02058072A3

公开(公告)日：2002-09-26

申请号：PCT/US0201406

申请日：2002-01-16

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： HSU LOUIS ,  FRANKOWSKY GERD ,  WEINFURTNER OLIVER

IPC: G11C11/407 ,  G06F15/78 ,  G11C11/401 ,  G11C11/403 ,  G11C11/406

CPC classification number: G11C11/406 ,  G11C2207/104 ,  G11C2207/2254

Abstract: A novel DRAM refresh method and system and a novel method of designing a low-power leakage monitoring device. With the DRAM refresh method, the refresh cycle time is adjusted based directly on the cell leakage condition. The method of designing a low-power leakage monitoring devices uses a memory cell identical to the cells in the real array. This monitor cell is designed so that it will represent the average cell or the worst cell leakage condition. If the leakage is severe, the refresh cycle time is significantly reduced, or halved. If the leakage level is very low or undetectable, then the refresh cycle time is significantly increased, or doubled. If the leakage is moderate, or in the normal range, the refresh time is optimized, so that the power consumption used for DRAM refresh is minimized. The advantages of this method over the existing method, that is, adjusting the refresh cycle time based on chip temperature include (1) the contributions from non-temperature dependent leakage factors are taken into consideration, (2) the present invention does not require different process steps, or extra process costs to integrate such device in the chip, and (3) the present invention is a straight forward method, the monitor cell does not need any calibration. In addition, its leakage mechanism and reliability concern are all identical to the cells in a real array.

Abstract translation: 一种新颖的DRAM刷新方法和系统以及设计低功耗漏电监测装置的新方法。 利用DRAM刷新方法，基于单元泄漏条件来调整刷新周期时间。 设计低功率泄漏监测装置的方法使用与真实阵列中的单元相同的存储单元。 该监视器单元被设计成它将代表平均单元或最坏的单元泄漏状况。 如果泄漏严重，则刷新周期时间会显着减少或减半。 如果泄漏电平非常低或不可检测，则刷新周期时间显着增加或加倍。 如果泄漏中等或在正常范围内，则刷新时间被优化，使得用于DRAM刷新的功耗最小化。 该方法优于现有方法，即基于芯片温度调整刷新周期时间的优点包括：（1）考虑到非温度依赖性泄漏因素的贡献，（2）本发明不需要不同的 处理步骤或额外的处理成本，以及（3）本发明是一种直接的方法，监测单元不需要任何校准。 此外，其泄漏机制和可靠性问题与实际阵列中的单元格完全相同。

公开(公告)号：WO0193271A2

公开(公告)日：2001-12-06

申请号：PCT/US0117267

申请日：2001-05-25

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： ELLIS WAYNE F ,  LI YUJUN ,  HSU LOUIS L ,  WEINFURTNER OLIVER ,  JI BRIAN L

IPC: G11C5/14 ,  G11C8/08 ,  G11C11/4074 ,  G11C11/4078

CPC classification number: G11C8/08 ,  G11C5/146 ,  G11C5/147 ,  G11C11/4074 ,  G11C11/4078 ,  G11C2207/104

Abstract: Improved transistor array device performance is obtained by use of bias voltage regulation which tracks with a fraction of a monitor transistor threshold voltage. The circuitry and methods are especially useful for improving the performance of transistor array devices such as DRAM and embedded DRAM. These benefits are obtained especially when at least two bias voltages normally supplied to the array are regulated by tracking with a fraction of an actual threshold voltage of at least one monitor transistor. Performance improvements include improved reliability, wider operational bias conditions, reduced power consumption and (in the case of memory cells) improved retention time.

Abstract translation: 通过使用以一小部分监视晶体管阈值电压跟踪的偏置电压调节来获得改进的晶体管阵列器件性能。 电路和方法对于改善诸如DRAM和嵌入式DRAM的晶体管阵列器件的性能特别有用。 这些优点是特别是当通过至少一个监视晶体管的实际阈值电压的一部分进行跟踪来调节通常提供给阵列的至少两个偏置电压时。 性能改进包括改进的可靠性，更宽的操作偏置条件，降低的功耗以及（在存储器单元的情况下）改进的保留时间。

公开(公告)号：WO0133706A9

公开(公告)日：2002-07-04

申请号：PCT/US0029820

申请日：2000-10-26

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： HSU LOUIS L C ,  WEINFURTNER OLIVER ,  WORDEMAN MATTHEW R

IPC: H02M3/07

CPC classification number: H02M3/073

Abstract: A charge pump generator system and method is provided in which on or more charge pumps are operated at multiple charging rates depending upon the level reached by a voltage supply. The system includes a limiter which provides a control signal based upon the level of the voltage supply. The control signal selects the frequency of a multiple frequency oscillator coupled thereto. The selected frequency determines the charge transfer rate of a charge pump used to maintain the voltage supply.

Abstract translation: 提供了一种电荷泵发电机系统和方法，其中根据电压达到的电平，多个充电速率的多个电荷泵运行。 该系统包括限幅器，其基于电压电平的电平提供控制信号。 控制信号选择与其耦合的多频振荡器的频率。 选定的频率决定了用于维持电压供应的电荷泵的电荷转移速率。

公开(公告)号：DE60011471D1

公开(公告)日：2004-07-15

申请号：DE60011471

申请日：2000-12-13

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： HSU L ,  WEINFURTNER OLIVER ,  WORDEMAN R

IPC: H02M3/07

Abstract: A charge pump generator system and method is provided which more precisely maintains the level of an internally generated voltage supply by operating some or all of the available charge pumps depending upon the voltage level reached by the voltage supply. When the voltage supply is far from its target level, a first group and a second group of charge pumps are operated. The first group may preferably have a faster pumping rate or a greater number of charge pumps than the second group. When the voltage supply exceeds a first predetermined level, the first group of charge pumps is switched off while the second group remains on, such that the rate of charge transfer slows. The second group continues operating until a second, e.g. target, voltage level is exceeded. The slower rate of charge transfer then effective reduces overshoot, ringing and noise coupled onto the voltage supply line. Preferably, at least one charge pump operates in both standby and active modes, thereby reducing chip area.

公开(公告)号：WO0171720A3

公开(公告)日：2002-06-06

申请号：PCT/US0108531

申请日：2001-03-15

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： WEINFURTNER OLIVER

IPC: G11C5/14

CPC classification number: G11C5/147

Abstract: In a controller (100) for controlling a generator system on a memory chip, the controller operates as a state machine in accordance with a state diagram including a plurality of X states. A state storage device (106) is responsive to input signals indicating a change in the state diagram from a current state to a next state for generating a revised plurality of X state output signals comprising a true State signal and a complementary true State signal for the next state of the plurality of X states. An output arrangement (108) is responsive to the true State signal and the complementary true State signal in the revised plurality of X state output signals from the state storage device for generating separate predetermined ones of M output signals associated with said next state for controlling the generator system while providing substantially zero current consumption when the state diagram reaches a final state of the plurality of X states.

Abstract translation: 在用于控制存储器芯片上的发电机系统的控制器（100）中，控制器根据包括多个X状态的状态图作为状态机操作。 状态存储设备（106）响应于指示状态图从当前状态到下一状态的改变的输入信号，用于产生修正的多个X状态输出信号，该X状态输出信号包括真状态信号和互补真状态信号 多个X状态的下一状态。 输出装置（108）响应来自状态存储装置的经修订的多个X状态输出信号中的真实状态信号和补充真实状态信号，用于产生与所述下一个状态相关联的M个输出信号中的单独的预定的一个，用于控制 发电机系统，同时在状态图达到多个X状态的最终状态时提供基本上为零的电流消耗。

公开(公告)号：WO0199116A2

公开(公告)日：2001-12-27

申请号：PCT/US0119184

申请日：2001-06-14

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： WEINFURTNER OLIVER

IPC: G05F3/24 ,  G11C514

CPC classification number: G05F3/242

Abstract: Apparatus is used to dynamically control the power output of generators (16A-16H) of a generator system on a chip (10) to load circuits on the chip. A power bus (14) is directed along at least one "spine" section (18) on the chip which may intersect with at least one "arm" section (19) on the chip for supplying power from the generators, which are coupled to the power bus in the "spine" section thereof, to the load circuits on the chip. The power bus has a feedback lead (32) from each end which is remote from the generators for providing a continuous measurement of a voltage drop occurring at each remote end. At least one detector circuit (100) is located at a predetermined point adjacent the generators of the chip for comparing a voltage from the generators measured at the predetermined point with the concurrent voltage drop measured at an associated remote end. In response to such comparison, the at least one detector circuit generates control signals (BOOST and SPEED) for transmission to the generators for altering a generated voltage to maintain a predetermined power level on the power bus in response to load changes caused by the circuits on the chip.

Abstract translation: 装置用于动态地控制芯片（10）上的发电机系统的发电机（16A-16H）的功率输出，以加载芯片上的电路。 电源总线（14）沿着芯片上的至少一个“脊”部分（18）引导，芯片上可以与芯片上的至少一个“臂”部分（19）相交，用于从发电机供电， 电源总线在“脊柱”部分，到芯片上的负载电路。 电源总线具有远离发电机的每端的反馈引线（32），用于连续测量在每个远端发生的电压降。 至少一个检测器电路（100）位于与芯片的发生器相邻的预定点处，用于将来自在预定点处测量的发生器的电压与在相关联的远程端测量的并发电压降进行比较。 响应于这样的比较，至少一个检测器电路产生用于传输到发电机的控制信号（BOOST和SPEED），用于改变所产生的电压，以响应由电路导致的负载变化而在电力总线上维持预定功率电平 芯片。

公开(公告)号：WO0171721A3

公开(公告)日：2002-06-06

申请号：PCT/US0108302

申请日：2001-03-14

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： WEINFURTNER OLIVER

IPC: G11C11/4074

CPC classification number: G11C11/4074

Abstract: In a flexible programmable controller (100) for controlling a generator system on a memory chip, the controller operates as a state machine in accordance with a state diagram including a plurality of X states. A state storage device (106) is responsive to input signals indicating a Reset state or a change in the state diagram from a current state to a next state for generating a Reset and an associated complementary Set signal or a revised plurality of X state output signals comprising a true State signal and a complementary true State signal for the next state of the plurality of X states. An output arrangement (108) is responsive to the Reset and complementary Set signals or the true State signal and the complementary true State signal in the revised plurality of X state output signals from the state storage device for generating separate predetermined ones of M output signals (OUT0-OUT4) associated with one of the Reset state or next state for controlling the generator system.

Abstract translation: 在用于控制存储器芯片上的发电机系统的灵活可编程控制器（100）中，控制器根据包括多个X状态的状态图作为状态机操作。 状态存储设备（106）响应于指示复位状态或状态图从当前状态到下一状态的输入信号，用于产生复位和相关联的互补设置信号或修改的多个X状态输出信号 包括对于多个X状态的下一状态的真实状态信号和补充真实状态信号。 输出装置（108）响应来自状态存储装置的修正的多个X状态输出信号中的复位和互补设置信号或真实状态信号和补充真实状态信号，用于产生M个输出信号中的单独的预定的 OUT0-OUT4）与用于控制发电机系统的复位状态或下一状态之一相关联。

公开(公告)号：WO0171723A3

公开(公告)日：2002-07-25

申请号：PCT/US0108532

申请日：2001-03-15

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： WEINFURTNER OLIVER

IPC: G11C5/14

CPC classification number: G11C5/147

Abstract: In a controller for controlling a generator system on a memory chip, the controller operates as a state machine in accordance with a state diagram including a plurality of X states. An evaluation arrangement evaluates a combination of only a predetermined one of a plurality of N input signals from remote devices, and only a predetermined one of a plurality of X state signals indicating a current state in the state diagram at any instant of time. The controller generates a plurality of Y output signals having a predetermined logical value that indicates that a change from one state to a next state in the state diagram is to be made when the predetermined one of both the plurality of N input signals and the plurality of X state signals comprise a predetermined logical value. A state storage device is responsive to the predetermined one of a plurality of Y output signals having a predetermined logical value, and generates a revised plurality of X state output signals for transmission back to the evaluation arrangement indicating a change in the state diagram from a current state to a next state of the plurality of X states. An output arrangement is responsive to the revised plurality of X state output signals for generating separate predetermined ones of M output signals to remote devices associated with said next state for controlling the generator system.

Abstract translation: 在用于控制存储器芯片上的发电机系统的控制器中，控制器根据包括多个X状态的状态图作为状态机操作。 评估装置仅评估来自远程设备的多个N个输入信号中的预定的一个输入信号的组合，并且仅在任何时间点处指示状态图中的当前状态的多个X状态信号中的预定的一个。 控制器产生具有预定逻辑值的多个Y输出信号，该预定逻辑值指示在多个N个输入信号和多个输入信号中的预定的一个输入信号和多个输入信号中的状态图中从一个状态到下一个状态的改变 X状态信号包括预定的逻辑值。 状态存储装置响应于具有预定逻辑值的多个Y输出信号中的预定的一个，并且生成修正的多个X状态输出信号，以便传送回评估装置，该评估装置指示状态图从当前的变化 状态到多个X状态的下一状态。 输出装置响应于经修订的多个X状态输出信号，用于向与用于控制发电机系统的所述下一状态相关联的远程设备产生M个输出信号的单独的预定的一个。

公开(公告)号：WO0201703A2

公开(公告)日：2002-01-03

申请号：PCT/US0120407

申请日：2001-06-26

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： WEINFURTNER OLIVER ,  MUELLER GERHARD

IPC: G11C5/14 ,  G11C17/18 ,  H02M3/00

CPC classification number: G11C17/18 ,  G11C5/145

Abstract: A voltage pump system for programming fuses on a semiconductor chip, in accordance with the present invention, includes a first pump system (12) employing a supply voltage (VDD) of the semiconductor chip as an input. The first pump system supplies an output voltage (VPP) higher than the supply voltage on a first output line (16) without raising the supply voltage of the semiconductor chip. A second pump system (20) includes an input connected to the first output. The second pump system supplies an output voltage (VFuse) sufficient for programming electrical fuses on the semiconductor chip.

Abstract translation: 根据本发明的用于在半导体芯片上编程熔丝的电压泵系统包括采用半导体芯片的电源电压（VDD）作为输入的第一泵系统（12）。 第一泵系统在不提高半导体芯片的电源电压的情况下提供高于第一输出线（16）上的电源电压的输出电压（VPP）。 第二泵系统（20）包括连接到第一输出的输入。 第二个泵系统提供足以在半导体芯片上编程电气保险丝的输出电压（VFuse）。

公开(公告)号：DE60103624D1

公开(公告)日：2004-07-08

申请号：DE60103624

申请日：2001-03-15

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： WEINFURTNER OLIVER

IPC: G11C5/14 ,  G11C11/00

Abstract: In a controller for controlling a generator system on a memory chip, the controller operates as a state machine in accordance with a state diagram including a plurality of X states. An evaluation arrangement evaluates a combination of only a predetermined one of a plurality of N input signals from remote devices, and only a predetermined one of a plurality of X state signals indicating a current state in the state diagram at any instant of time. The controller generates a plurality of Y output signals having a predetermined logical value that indicates that a change from one state to a next state in the state diagram is to be made when the predetermined one of both the plurality of N input signals and the plurality of X state signals comprise a predetermined logical value. A state storage device is responsive to the predetermined one of a plurality of Y output signals having a predetermined logical value, and generates a revised plurality of X state output signals for transmission back to the evaluation arrangement indicating a change in the state diagram from a current state to a next state of the plurality of X states. An output arrangement is responsive to the revised plurality of X state output signals for generating separate predetermined ones of M output signals to remote devices associated with said next state for controlling the generator system.