公开(公告)号：GB2514221A

公开(公告)日：2014-11-19

申请号：GB201404228

申请日：2014-03-11

Applicant: INTEL CORP

Inventor： YAMADA KOICHI ,  SHANMUGAVELAYUTHAM PALANIVEL RAJAN ,  RODGERS SCOTT D ,  HUNTLEY BARRY E ,  BEANEY JAMES D JR ,  TAMIR BOAZ

IPC: G06F9/455

Abstract: A co-designed processor 605, such as a heterogeneous multi-core processor, includes, isolated from a software stack and transparent thereto by way of means such as concealed memory 640, a binary translation (BT) engine 645 having code to generate a binary translation of a first code segment and to store the binary translation in a translation cache 648. The binary translated code may include a routine to emulate an instruction not provided in the target ISA such as an instruction with a vector operand wherein a width of a datapath of the target core is less than a width of the vector operand. The heterogeneous multi-core processor may include a first and second core for executing instructions of a first ISA and a second ISA respectively wherein the second ISA may be different to the first ISA or a subset thereof. The second core may have lower power consumption than the first core and the binary translation may be from the first ISA to the second ISA.

公开(公告)号：EP3123340A4

公开(公告)日：2017-11-01

申请号：EP15768625

申请日：2015-03-27

Applicant: INTEL CORP

Inventor： XING BIN CEDRIC ,  SHANAHAN MARK W ,  BEANEY JAMES D JR

IPC: G06F12/14 ,  G06F9/44 ,  G06F21/53 ,  G06F21/62

CPC classification number: G06F21/60 ,  G06F21/53

Abstract: A system is disclosed and includes a processor to automatically execute enclave initialization code within a host application at run time of the host application. The enclave initialization code includes marshaling code to create a secure enclave separate from the host application. The marshaling code is generated at build time of the host application. The system also includes a dynamic random access memory (DRAM) including a dedicated DRAM portion to store the secure enclave. Other embodiments are described and claimed.