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    Managing timing of protocol stack
    2.
    发明专利
    Managing timing of protocol stack 有权
    管理协议栈的时序

    公开(公告)号：JP2012105344A

    公开(公告)日：2012-05-31

    申请号：JP2012004950

    申请日：2012-01-13

    Applicant: Intel Corp ,  インテル・コーポレーション

    Inventor： HARRIMAN DAVID J

    IPC: H04L29/10

    CPC classification number: H04L12/4633 ,  H04L69/28

    Abstract: PROBLEM TO BE SOLVED: To provide a mechanism for managing an explicit and suggestive timer of protocols to be tunneled when executing tunneling via a tunneling interconnect.SOLUTION: The method includes the following stages of: receiving communication in a protocol stack coupled to a tunneling interconnect; deciding whether or not a communication type is affected by a timing after change to cope with a delay associated with the tunneling interconnect; adjusting a timing of at least one stack logic to cope with the delay; and processing the communication using the adjusted timing.

    Abstract translation: 要解决的问题：提供一种用于管理当经由隧道互连执行隧道时待隧道化的协议的显式和暗示定时器的机制。 解决方案：该方法包括以下阶段：在耦合到隧道互连的协议栈中接收通信; 决定通信类型是否受到改变之后的定时影响以处理与隧道互连相关联的延迟; 调整至少一个堆栈逻辑的时序以处理延迟; 以及使用调整的定时处理通信。 版权所有（C）2012，JPO＆INPIT

    Managing timing of protocol stack
    3.
    发明专利
    Managing timing of protocol stack 有权
    管理协议栈的时序

    公开(公告)号：JP2010088106A

    公开(公告)日：2010-04-15

    申请号：JP2009165061

    申请日：2009-07-13

    Applicant: Intel Corp ,  インテル・コーポレーション

    Inventor： HARRIMAN DAVID J

    IPC: H04L29/10 ,  G06F13/38 ,  G06F13/42 ,  H04L12/56

    CPC classification number: H04L12/4633 ,  H04L69/28

    Abstract: PROBLEM TO BE SOLVED: To provide a mechanism for managing an explicit and suggestible timer of protocols to be tunneled when executing tunneling via a tunneling interconnect. SOLUTION: The method includes the stages of: receiving a communication in a protocol stack coupled to a tunneling interconnect; making a determination as to whether the communication type is subject to altered timing to cope with a delay associated with the tunneling interconnect; adjusting the timing of at least one stack logic to cope with the delay; and handling the communication using the adjusted timing. COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种用于管理当经由隧道互连执行隧道时要隧道化的协议的显式和可建议的定时器的机制。 解决方案：该方法包括以下阶段：在耦合到隧道互连的协议栈中接收通信; 确定通信类型是否经受更改的定时以处理与隧道互连相关联的延迟; 调整至少一个堆叠逻辑的时序以应对延迟; 以及使用调整的定时处理通信。 版权所有（C）2010，JPO＆INPIT

    METHOD AND APPARATUS FOR AN IMPROVED INTERFACE BETWEEN COMPUTER COMPONENTS
    5.
    发明申请
    METHOD AND APPARATUS FOR AN IMPROVED INTERFACE BETWEEN COMPUTER COMPONENTS 审中-公开
    计算机组件之间改进接口的方法和装置

    公开(公告)号：WO0131460A9

    公开(公告)日：2002-07-04

    申请号：PCT/US0029275

    申请日：2000-10-23

    Applicant: INTEL CORP ,  AJANOVIC JASMIN ,  HARRIMAN DAVID J

    Inventor： AJANOVIC JASMIN ,  HARRIMAN DAVID J

    IPC: G06F13/40 ,  G06F13/42

    CPC classification number: G06F13/4208 ,  G06F13/4022

    Abstract: An interface to transfer data between a memory control hub and an input/output control hub of a chipset within a computer system. One embodiment of the interface includes a bi-directional data signal path and a pair of source synchronous strobe signals. The data signal path transmits data in packets via split transactions. In addition, the packets include a request packet and a completion packet, if necessary. Furthermore, in one embodiment, the request packets include a transaction descriptor.

    Abstract translation: 用于在计算机系统内的存储器控​​制集线器和芯片组的输入/输出控制集线器之间传送数据的接口。 接口的一个实施例包括双向数据信号路径和一对源同步选通信号。 数据信号路径通过分组事务发送数据包。 此外，如果需要，分组包括请求分组和完成分组。 此外，在一个实施例中，请求分组包括事务描述符。

    OPTIMIZED LINK TRAINING AND MANAGEMENT MECHANISM
    6.
    发明申请
    OPTIMIZED LINK TRAINING AND MANAGEMENT MECHANISM 审中-公开
    优化的链接培训与管理机制

    公开(公告)号：WO2013176954A2

    公开(公告)日：2013-11-28

    申请号：PCT/US2013041322

    申请日：2013-05-16

    Applicant: INTEL CORP

    Inventor： WAGH MAHESH ,  HARRIMAN DAVID J

    IPC: G06F13/42 ,  G06F1/32

    CPC classification number: G06F13/4282 ,  G06F1/3253 ,  G06F13/385 ,  H04Q2213/13003 ,  Y02B60/1235 ,  Y02B60/32 ,  Y02D10/151 ,  Y02D50/20

    Abstract: In one embodiment, a converged protocol stack can be used to unify communications from a first communication protocol to a second communication protocol to provide for data transfer across a physical interconnect. This stack can be incorporated in an apparatus that includes a protocol stack for a first communication protocol including transaction and link layers, and a physical (PHY) unit coupled to the protocol stack to provide communication between the apparatus and a device coupled to the apparatus via a physical link. This PHY unit may include a physical unit circuit according to the second communication protocol. Other embodiments are described and claimed.

    Abstract translation: 在一个实施例中，可以使用融合协议栈来将通信从第一通信协议统一到第二通信协议，以提供跨物理互连的数据传输。 该堆叠可以并入包括用于包括交易和链路层的第一通信协议的协议栈的装置，以及耦合到协议栈的物理（PHY）单元，以在设备和耦合到装置的设备之间通信 一个物理链接。 该PHY单元可以包括根据第二通信协议的物理单元电路。 描述和要求保护其他实施例。

    OPPORTUNISTIC IMPROVEMENT OF MMIO REQUEST HANDLING BASED ON TARGET REPORTING OF SPACE REQUIREMENTS
    7.
    发明申请
    OPPORTUNISTIC IMPROVEMENT OF MMIO REQUEST HANDLING BASED ON TARGET REPORTING OF SPACE REQUIREMENTS 审中-公开
    基于目标报告空间要求的MMIO请求处理的机会改进

    公开(公告)号：WO2010117528A3

    公开(公告)日：2011-01-27

    申请号：PCT/US2010026558

    申请日：2010-03-08

    Applicant: INTEL CORP ,  HARRIMAN DAVID J ,  GLEW ANDREW F

    Inventor： HARRIMAN DAVID J ,  GLEW ANDREW F

    IPC: G06F13/14 ,  G06F9/46 ,  G06F12/02 ,  G06F15/16

    CPC classification number: G06F13/16 ,  G06F9/46 ,  G06F12/02 ,  G06F12/063 ,  G06F12/1027 ,  G06F13/14 ,  G06F15/16 ,  G06F2212/654

    Abstract: Methods and apparatus for opportunistic improvement of Memory Mapped Input/Output (MMIO) request handling (e.g., based on target reporting of space requirements) are described. In one embodiment, logic in a processor may detect one or more bits in a message that is to be transmitted from an input/output (I/O) device. The one or more bits may indicate memory mapped I/O (MMIO) information corresponding to one or more attributes of the I/O device. Other embodiments are also disclosed.

    Abstract translation: 描述了存储映射输入/输出（MMIO）请求处理的机会性改进的方法和装置（例如，基于空间要求的目标报告）。 在一个实施例中，处理器中的逻辑可以检测要从输入/输出（I / O）设备发送的消息中的一个或多个位。 一个或多个比特可以指示对应于I / O设备的一个或多个属性的存储器映射I / O（MMIO）信息。 还公开了其他实施例。

    METHOD AND APPARATUS FOR AN IMPROVED INTERFACE BETWEEN COMPUTER COMPONENTS
    9.
    发明公开
    METHOD AND APPARATUS FOR AN IMPROVED INTERFACE BETWEEN COMPUTER COMPONENTS 有权
    方法和设备之间的计算机部件改进的界面

    公开(公告)号：EP1127318A4

    公开(公告)日：2004-04-14

    申请号：EP99971542

    申请日：1999-11-01

    Applicant: INTEL CORP

    Inventor： AJANOVIC JASMIN ,  HARRIMAN DAVID J

    IPC: G06F13/42 ,  G06F13/14 ,  H04L29/06 ,  H04L29/10

    CPC classification number: G06F13/4208

    Abstract: An interface to transfer data between a memory controller hub (204) and an input/output (I/O) hub (206) of a chipset within a computer system. One embodiment of the interface includes a bi-directional data signal path (202) and a pair of source synchronous strobe signals. The data signal path transmits data in packets via split transactions. In addition, the packets include a request packet and a completion packet, if necessary. Furthermore, in one embodiment, the request packets include a transaction descriptor.

    OPTIMIZED LINK TRAINING AND MANAGEMENT MECHANISM
    10.
    发明申请
    OPTIMIZED LINK TRAINING AND MANAGEMENT MECHANISM 审中-公开
    优化的链接培训和管理机制

    公开(公告)号：WO2013176954A3

    公开(公告)日：2014-02-27

    申请号：PCT/US2013041322

    申请日：2013-05-16

    Applicant: INTEL CORP

    Inventor： WAGH MAHESH ,  HARRIMAN DAVID J

    IPC: G06F13/42 ,  G06F1/32

    CPC classification number: G06F13/4282 ,  G06F1/3253 ,  G06F13/385 ,  H04Q2213/13003 ,  Y02B60/1235 ,  Y02B60/32 ,  Y02D10/151 ,  Y02D50/20

    Abstract: In one embodiment, a converged protocol stack can be used to unify communications from a first communication protocol to a second communication protocol to provide for data transfer across a physical interconnect. This stack can be incorporated in an apparatus that includes a protocol stack for a first communication protocol including transaction and link layers, and a physical (PHY) unit coupled to the protocol stack to provide communication between the apparatus and a device coupled to the apparatus via a physical link. This PHY unit may include a physical unit circuit according to the second communication protocol. Other embodiments are described and claimed.

    Abstract translation: 在一个实施例中，可以使用融合协议栈来将通信从第一通信协议统一到第二通信协议，以提供跨物理互连的数据传输。 该堆栈可以并入包括用于包括事务和链路层的第一通信协议的协议栈的装置，以及耦合到协议栈的物理（PHY）单元，以在装置和耦合到装置的装置之间通信 一个物理链接。 该PHY单元可以包括根据第二通信协议的物理单元电路。 描述和要求保护其他实施例。

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