公开(公告)号：GB2512727B

公开(公告)日：2015-10-21

申请号：GB201402938

申请日：2014-02-19

Applicant: INTEL CORP

Inventor： BOBBA JAYARAM ,  SASANKA RUCHIRA ,  COOK JEFFREY J ,  DAS ABHINAV ,  KRISHNASWAMY ARVIND ,  SAGER DAVID J ,  AGRON JASON M

IPC: G06F9/30 ,  G06F1/32 ,  G06F9/455 ,  G06F11/34 ,  G06F11/36

公开(公告)号：BR102014005801A2

公开(公告)日：2016-03-15

申请号：BR102014005801

申请日：2014-03-13

Applicant: INTEL CORP

Inventor： DAS ABHINAV ,  KRISHNASWAMY ARVIND ,  SAGER DAVID J ,  AGRON JASON M ,  BORBA JAYARAM ,  COOK JEFFREY J ,  SASANKA RUCHIRA

IPC: G06F9/30 ,  G06F9/44 ,  G06F11/00

Abstract: rastreamento de fluxo de controle de instruções - um mecanismo para rastrear o fluxo de controle de instruções em uma aplicação e realizar uma ou mais otimizações de um dispositivo de processamento, com base no fluxo de controle de instruções na aplicação, é revelado. os dados de fluxo de controle são gerados para indicar o fluxo de controle de blocos de instruções na aplicação. os dados de fluxo de controle podem incluir anotações que indicam se otimizações pode ser realizadas para diferentes blocos de instruções. os dados de fluxo de controle podem também ser usados para rastrear a execução das instruções para determinar se uma instrução em um bloco de instruções está atribuída a um thread, um processo, e/ou um núcleo de execução de um processador, e para determinar se os erros ocorreram durante a execução das instruções.

公开(公告)号：GB2512727A

公开(公告)日：2014-10-08

申请号：GB201402938

申请日：2014-02-19

Applicant: INTEL CORP

Inventor： BOBBA JAYARAM ,  SASANKA RUCHIRA ,  COOK JEFFREY J ,  DAS ABHINAV ,  KRISHNASWAMY ARVIND ,  SAGER DAVID J ,  AGRON JASON M

IPC: G06F9/30 ,  G06F1/32 ,  G06F9/455 ,  G06F11/34 ,  G06F11/36

Abstract: A method of operating a device with a processor that includes receiving control flow data, the control flow data including block identifiers for blocks of instructions, destination identifiers for one or more of the blocks of the instructions, and annotations for the blocks of instructions; the method further includes determining a destination identifier for a current instruction block based on the control flow data; identifying an annotation associated with the current instruction block based on the control flow data; and performing at least one of: modifying resources used by a processor; or tracking execution of the blocks of instructions based on one or more of the annotation or the destination identifier. Optimisation of a processing device may be performed according to the annotations by way of reducing the number of components used. Tracking of the execution of the blocks of instructions may be used to determine if a hard error in memory or a soft error in execution has occurred with reference to annotation indicating the number of instructions within in a current instruction block.

公开(公告)号：DE102014003689A1

公开(公告)日：2014-09-18

申请号：DE102014003689

申请日：2014-03-14

Applicant: INTEL CORP

Inventor： AGRON JASON M ,  SASANKA RUCHIRA ,  KRISHNASWAMY ARVIND ,  COOK JEFFREY J ,  SAGER DAVID J ,  BOBBA JAYARAM ,  DAS ABHINAV

IPC: G06F9/38

Abstract: Ein Mechanismus für die Verfolgung des Kontrollflusses in einer Anwendung und die Durchführung von einer oder mehreren Optimierungen eines Verarbeitungsgeräts auf Basis des Kontrollflusses der Befehle in der Anwendung wird offenbart. Kontrollflussdaten werden erzeugt, um den Kontrollfluss der Befehlsblöcke in der Anwendung anzugeben. Die Kontrollflussdaten können Anmerkungen beinhalten, die angeben, ob Optimierungen für die verschiedenen Befehlsblöcke durchgeführt werden können. Die Kontrollflussdaten können auch verwendet werden, um die Ausführung der Befehle zu verfolgen, um zu bestimmen, ob ein Befehl in einem Befehlsblock einem Thread, einem Prozess und/oder einem Ausführungskern eines Prozessors zugewiesen ist, und um zu bestimmen, ob Fehler während der Ausführung der Befehle aufgetreten sind.

公开(公告)号：EP2962240A4

公开(公告)日：2016-09-07

申请号：EP13876553

申请日：2013-02-28

Applicant: INTEL CORP

Inventor： SHANMUGAVELAYUTHAM PALANIVELRAJAN R ,  YAMADA KOICHI ,  SAHITA RAVI ,  KRISHNASWAMY ARVIND

IPC: G06F21/50 ,  G06F21/54 ,  G06F21/56

CPC classification number: G06F21/566 ,  G06F21/54 ,  G06F21/56 ,  G06F21/567

Abstract: In an embodiment, a processor includes a binary translation engine to receive a code segment, to generate a binary translation of the code segment, and to store the binary translation in a translation cache, where the binary translation includes at least one policy check routine to be executed during execution of the binary translation on behalf of a security agent. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，处理器包括二进制翻译引擎，用于接收代码段，生成代码段的二进制转换，并将二进制转换存储在转换高速缓存中，其中二进制转换包括至少一个策略检查例程 在代表安全代理的二进制翻译执行期间执行。 描述和要求保护其他实施例。

公开(公告)号：EP2956885A4

公开(公告)日：2016-10-05

申请号：EP14751212

申请日：2014-02-05

Applicant: INTEL CORP

Inventor： VENKAT ASHISH ,  KRISHNASWAMY ARVIND ,  YAMADA KOICHI ,  SHANMUGAVELAYUTHAM PALANIVELRAJAN R

IPC: G06F21/55 ,  G06F21/56

CPC classification number: G06F21/52 ,  G06F21/79

Abstract: This disclosure is directed to binary translator driven program state relocation. In general, a device may protect vulnerable program functions by setting them as non-executable. If an attempt is made to execute a protected program function, the program may trap to a binary translator in the device that may be configured to relocate program state from what has already been established (e.g., on a stack register). Program state may include resources (e.g., memory locations) used by the program during the course of execution. The binary translator may then translate the program into an executable form based on the relocated program state, and may be executed accordingly. Intruding code that attempts to overcome normal program execution and implement hostile operations (e.g., based the program state that is reflected in the stack register) will not function as intended since the relocated program state will cause unexpected results.

公开(公告)号：EP2791785A4

公开(公告)日：2017-01-18

申请号：EP11877535

申请日：2011-12-16

Applicant: INTEL CORP

Inventor： KRISHNASWAMY ARVIND ,  LAVERY DANIEL M

IPC: G06F9/45 ,  G06F9/30 ,  G06F9/305 ,  G06F9/38 ,  G06F9/455 ,  G06F9/46

CPC classification number: G06F9/3861 ,  G06F8/49 ,  G06F9/3004 ,  G06F9/30072 ,  G06F9/30087 ,  G06F9/30174 ,  G06F9/3857 ,  G06F9/3859 ,  G06F9/3863 ,  G06F9/45525 ,  G06F9/467

Abstract: A method and system uses exceptions for code specialization in a system that supports transactions. The method and system includes inserting one or more branchless instructions into a sequence of computer instructions. The branchless instructions include one or more instructions that are executable if a commonly occurring condition is satisfied and include one or more instructions that are configured to raise an exception if the commonly occurring condition is not satisfied.

Abstract translation: 方法和系统在支持事务的系统中使用异常代码专门化。 该方法和系统包括将一个或多个无分支指令插入到一系列计算机指令中。 无分支指令包括一个或多个可执行的指令，如果共同发生的条件被满足并且包括如果共同发生的条件不被满足则配置成引发异常的一个或多个指令。

公开(公告)号：EP3039608A4

公开(公告)日：2017-01-11

申请号：EP13892527

申请日：2013-08-28

Applicant: INTEL CORP

Inventor： DALCHER GREG WILLIAM ,  SAHITA RAVI L ,  SHANMUGAVELAYUTHAM PALANIVELRA ,  YAMADA KOICHI ,  KRISHNASWAMY ARVIND

IPC: G06F21/56 ,  G06F11/30 ,  G06F21/55

CPC classification number: G06F21/566 ,  G06F21/554

Abstract: Technologies for assembling an execution profile of an event are disclosed. The technologies may include monitoring the event for a branch instruction, generating a callback to a security module upon execution of the branch instruction, filtering the callback according to a plurality of event identifiers, and validating a code segment associated with the branch instruction, the code segment including code executed before the branch instruction and code executed after the branch instruction.

Abstract translation: 公开了组装事件的执行简档的技术。 技术可以包括监视分支指令的事件，在执行分支指令时产生对安全模块的回调，根据多个事件标识符过滤回调，以及验证与分支指令相关联的代码段，代码 段包括在分支指令之前执行的代码和在分支指令之后执行的代码。