中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

18 records (took 0.035 seconds)

    Method and apparatus for vectorizing multiple input instructions
    1.
    发明专利
    Method and apparatus for vectorizing multiple input instructions 有权
    用于验证多个输入指令的方法和装置

    公开(公告)号：JP2011165216A

    公开(公告)日：2011-08-25

    申请号：JP2011110994

    申请日：2011-05-18

    Applicant: Intel Corp ,  インテル コーポレイション

    Inventor： ALMOG YOAV ,  ROSNER RONI ,  RONEN RONNY

    IPC: G06F9/45 ,  G06F9/38

    CPC classification number: G06F9/3808 ,  G06F9/3885 ,  G06F9/3887

    Abstract: PROBLEM TO BE SOLVED: To provide an effective method and an apparatus for vectorizing a plurality of input instructions. SOLUTION: The apparatus has an optimization unit for searching two or more instructions with operation codes with common traces and when the two or more instructions have the same levels in a trace dependence tree for merging the two or more instructions with one SIMD (Single Instruction Multiple Data) instruction. The trace dependence tree has instructions in a plurality of levels with instructions where each level has the same instruction, and the trace instruction is stored in a memory of the apparatus. COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题：提供用于对多个输入指令进行矢量化的有效方法和装置。 解决方案：该装置具有用于使用具有公共迹线的操作码来搜索两个或多个指令的优化单元，并且当两个或更多个指令在用于将两个或更多个指令与一个SIMD合并的跟踪依赖树中具有相同的级别时 单指令多数据）指令。 跟踪依赖树具有多个级别的指令，其中每个级别具有相同的指令，并且跟踪指令被存储在该设备的存储器中。 版权所有（C）2011，JPO＆INPIT

    SYSTEM, METHOD AND APPARATUS FOR DEPENDENCY CHAIN PROCESSING
    2.
    发明申请
    SYSTEM, METHOD AND APPARATUS FOR DEPENDENCY CHAIN PROCESSING 审中-公开
    用于依赖链处理的系统，方法和装置

    公开(公告)号：WO2006036504A2

    公开(公告)日：2006-04-06

    申请号：PCT/US2005032118

    申请日：2005-09-12

    Applicant: INTEL CORP

    Inventor： NARAYANASAMY SATISH ,  WANG HONG ,  SHEN JOHN ,  ROSNER RONI ,  ALMOG YOAV ,  SCHWARTZ NAFTALI ,  HOFLEHNER GEROLF ,  LAVERY DANIEL ,  LI WEI ,  TIAN XINMIN ,  GIRKAR MILIND ,  WANG PERRY

    IPC: G06F9/45

    CPC classification number: G06F8/443 ,  G06F8/433 ,  G06F8/451

    Abstract: Embodiments of the present invention provide a method, apparatus and system which may include splitting a dependency chain into a set of reduced-width dependency chains; mapping one or more dependency chains onto one or more clustered dependency chain processors, wherein an issue-width of one or more of the clusters is adapted to accommodate a size of the dependency chains; and/or processing in parallel a plurality of dependency chains of a trace. Other embodiments are described and claimed.

    Abstract translation: 本发明的实施例提供了一种方法，装置和系统，其可以包括将依赖链分解成一组缩减宽度的依赖性链; 将一个或多个依赖关系链映射到一个或多个聚类依赖链处理器上，其中一个或多个所述簇的问题宽度适于适应所述依赖关系链的大小; 和/或并行处理多个跟踪的依赖性链。 描述和要求保护其他实施例。

    6.
    发明专利
    未知

    公开(公告)号：DE10297624T5

    公开(公告)日：2004-11-25

    申请号：DE10297624

    申请日：2002-12-27

    Applicant: INTEL CORP

    Inventor： ROSNER RONI ,  MENDELSON AVI

    IPC: G06F9/45 ,  G06F9/318

    Abstract: In an embodiment, a method includes receiving a binary of a program code. The binary is based on a first instruction set architecture. The method also includes translating the binary, wherein the translated binary is based on a combination of the first instruction set architecture and a second instruction set architecture.

    9.
    发明专利
    未知

    公开(公告)号：DE112005001277T5

    公开(公告)日：2007-05-16

    申请号：DE112005001277

    申请日：2005-05-25

    Applicant: INTEL CORP

    Inventor： ALMOG YOAV ,  ROSNER RONI ,  RONEN RONNY

    IPC: G06F9/38 ,  G06F9/45 ,  G06F15/80

    Abstract: An optimization unit to search for two or more candidate instructions in an instruction trace and to merge the two or more candidate instructions into a single instruction with multiple data (SIMD) according to a depth of a trace dependency and a common operation code of the two or more candidate instructions.

Patent Agency Ranking