公开(公告)号：WO2016048594A1

公开(公告)日：2016-03-31

申请号：PCT/US2015/047748

申请日：2015-08-31

Applicant: INTEL CORPORATION

Inventor： COWLEY, Nicholas P. ,  SARASWAT, Ruchir ,  GOLDMAN, Richard J. ,  BERNARD, David T. ,  WALSH, Gordon J. ,  LANGAN, Michael

IPC: G05F1/56 ,  G11C5/14

CPC classification number: H02M3/156 ,  G05F1/56 ,  H02M1/36 ,  H02M2001/0032 ,  H02M2001/009 ,  H02M2003/1566

Abstract: In at least one embodiment there is provided a method for managing bulk capacitance of a power supply system. The method includes precharging first and second bulk capacitors of the power supply system to approximately a first output voltage level and a second output voltage level, respectively; receiving a first command signal to generate, by the power supply, the first output voltage level; coupling the first bulk capacitance to load circuitry coupled to the power supply; receiving a second command signal to generate, by the power supply, the second output voltage level; and coupling the second bulk capacitance to the load circuitry coupled to the power supply.

Abstract translation: 在至少一个实施例中，提供了一种用于管理电源系统的体电容的方法。 该方法包括分别将电源系统的第一和第二大容量电容器预先充电到大致第一输出电压电平和第二输出电压电平; 接收第一命令信号以通过电源产生第一输出电压电平; 将所述第一体电容耦合到耦合到所述电源的负载电路; 接收第二命令信号，以通过电源产生第二输出电压电平; 以及将所述第二体电容耦合到耦合到所述电源的所述负载电路。

公开(公告)号：WO2013095676A1

公开(公告)日：2013-06-27

申请号：PCT/US2011/067286

申请日：2011-12-23

Applicant: INTEL CORPORATION ,  SCHAEFFER, Andre ,  SARASWAT, Ruchir

Inventor： SCHAEFFER, Andre ,  SARASWAT, Ruchir

IPC: G11C5/02 ,  G11C11/4074 ,  H01L23/48

CPC classification number: G11C7/00 ,  G11C5/025 ,  G11C5/147 ,  G11C11/4074 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Separate microchannel voltage domains in a stacked memory architecture An embodiment of a memory device includes a memory stack including one or more coupled memory dies, wherein a first memory die of the memory stack includes multiple microchannels, and a logic chip coupled with the memory stack, the logic chip including a memory controller. Each of the microchannels includes a separate voltage domain, and a voltage level is controlled for each of the plurality of microchannels.

Abstract translation: 在堆叠式存储器架构中的分离的微通道电压域存储器件的一个实施例包括一个包括一个或多个耦合的存储器管芯的存储器堆栈，其中存储器堆叠的第一存储器管芯包括多个微通道，以及与存储堆栈耦合的逻辑芯片， 逻辑芯片包括存储器控制器。 每个微通道包括单独的电压域，并且为多个微通道中的每一个控制电压电平。

公开(公告)号：WO2016106027A1

公开(公告)日：2016-06-30

申请号：PCT/US2015/065927

申请日：2015-12-16

Applicant: INTEL CORPORATION

Inventor： COWLEY, Nicholas P. ,  SARASWAT, Ruchir ,  GOLDMAN, Richard J.

IPC: G06F3/01 ,  G06F1/16

CPC classification number: A61B5/0015 ,  A61B5/02438 ,  A61B5/486 ,  A61B5/681 ,  A61B5/742 ,  A61B5/746 ,  G04G17/083 ,  G04G21/00 ,  G06F19/00 ,  G06F19/3481 ,  G08B21/182 ,  G16H40/63

Abstract: Particular embodiments described herein provide for an electronic device, such as a wrist worn electronic device. One particular example implementation of the electronic device may include a main housing, a main display in the main housing, a wrist strap that allows the main housing to be secured to a user such that the main display is located on top of a wrist of the user, and a secondary display located on the wrist strap, where the secondary display communicates information to the user without the user having to turn the wrist.

Abstract translation: 本文所述的特定实施例提供了一种电子设备，例如腕部佩戴的电子设备。 电子设备的一个具体示例实施例可以包括主壳体，主壳体中的主显示器，允许主壳体固定到使用者的腕带，使得主显示器位于主壳体的手腕的顶部 用户和位于腕带上的辅助显示器，其中辅助显示器向用户传达信息，而用户不必转动手腕。

公开(公告)号：WO2016048529A1

公开(公告)日：2016-03-31

申请号：PCT/US2015/046749

申请日：2015-08-25

Applicant: INTEL CORPORATION

Inventor： COWLEY, Nicholas P. ,  SARASWAT, Ruchir ,  GOLDMAN, Richard J.

IPC: A61B5/00

CPC classification number: A61B5/486 ,  A61B5/0002 ,  A61B5/0015 ,  A61B5/0022 ,  A61B5/0024 ,  A61B5/0028 ,  A61B5/0531 ,  A61B5/0533 ,  A61B5/72 ,  A61B5/7228 ,  A61B5/725 ,  A61B5/7405 ,  A61B5/742 ,  A61B5/7455 ,  A61B5/7475 ,  A61B2560/0475 ,  G06F19/00 ,  G16H40/63 ,  H04B13/005 ,  H04L67/12 ,  H04W4/38 ,  H04W4/80

Abstract: Technologies for the sensing of biofeedback signals of a user include a body area network (BAN) system comprising one or more biofeedback sensors and one or more BAN controllers. The biofeedback sensors are configured to sense BAN signals, which may include biofeedback signals and body-coupled communication (BCC) signals. To facilitate communication, the biofeedback sensors may demultiplex the sensed BAN signals into biofeedback signals and incoming BCC signals. Similarly, the biofeedback sensors may multiplex outgoing BCC signals with sensed biofeedback signals. The BAN controller may communicate in a similar manner. Additionally, the BAN controller may process incoming BCC signals and provide feedback to the user based on BCC signals received from the biofeedback sensors.

Abstract translation: 用于感测用户的生物反馈信号的技术包括包括一个或多个生物反馈传感器和一个或多个BAN控制器的体区网络（BAN）系统。 生物反馈传感器被配置为感测BAN信号，其可以包括生物反馈信号和体耦合通信（BCC）信号。 为了促进通信，生物反馈传感器可以将感测到的BAN信号解复用为生物反馈信号和输入的BCC信号。 类似地，生物反馈传感器可以将输出的BCC信号与感测的生物反馈信号进行多路复用。 BAN控制器可以以类似的方式进行通信。 此外，BAN控制器可以处理传入的BCC信号并且基于从生物反馈传感器接收的BCC信号向用户提供反馈。

公开(公告)号：WO2018005024A1

公开(公告)日：2018-01-04

申请号：PCT/US2017/036308

申请日：2017-06-07

Applicant: INTEL CORPORATION

Inventor： SARASWAT, Ruchir ,  COWLEY, Nicholas ,  GOLDMAN, Richard ,  MCGLEW, Patrick Gerard

IPC: G06F3/01

CPC classification number: G06F3/013 ,  G06F3/015 ,  G06F3/048 ,  G06F3/0481

Abstract: An ocular control system arranged to determine electric potentials associated with a set of sensor. The ocular control system may determine direction of gaze or motion based on the determined electric potentials. The determined direction of gaze or motion may be used to provide data input for a computing device.

Abstract translation: 眼控制系统布置成确定与一组传感器相关联的电位。 眼控制系统可以基于所确定的电势来确定凝视或运动的方向。 所确定的注视或运动方向可以用于为计算设备提供数据输入。

公开(公告)号：WO2016105645A1

公开(公告)日：2016-06-30

申请号：PCT/US2015/055143

申请日：2015-10-12

Applicant: INTEL CORPORATION

Inventor： COWLEY, Nicholas P. ,  SARASWAT, Ruchir ,  PERRY, Colin L. ,  AITKEN, Matthew T. ,  GOLDMAN, Richard J. ,  KAN, Chi Man

IPC: G06Q50/12 ,  G06Q50/22 ,  H04W84/18 ,  G06F19/00

CPC classification number: G08B21/02 ,  G06Q50/12 ,  G06Q50/22 ,  G08B3/10 ,  G08B5/36

Abstract: A method monitors the consumption of materials, including determining the presence of materials in a smart receptacle using a sensor located in the smart receptacle. A server is alerted when an actionable item is detected.

Abstract translation: 一种方法监测材料的消耗，包括使用位于智能插座中的传感器确定智能插座中材料的存在。 当检测到可操作的项目时，将提醒服务器。

公开(公告)号：WO2015099668A1

公开(公告)日：2015-07-02

申请号：PCT/US2013/077559

申请日：2013-12-23

Applicant: INTEL CORPORATION ,  LEE, Kevin, J. ,  SARASWAT, Ruchir ,  ZILLMANN, Uwe ,  COWLEY, Nicholas, P. ,  SCHAEFER, Andre ,  JAIN, Rinkle ,  DROEGE, Guido

Inventor： LEE, Kevin, J. ,  SARASWAT, Ruchir ,  ZILLMANN, Uwe ,  COWLEY, Nicholas, P. ,  SCHAEFER, Andre ,  JAIN, Rinkle ,  DROEGE, Guido

IPC: H01L27/108

CPC classification number: H01L23/5223 ,  H01L21/4846 ,  H01L21/486 ,  H01L21/4875 ,  H01L21/76898 ,  H01L21/8221 ,  H01L23/481 ,  H01L23/492 ,  H01L23/498 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L25/0657 ,  H01L27/0629 ,  H01L28/90 ,  H01L2225/06544 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Techniques are disclosed for forming a through-body-via (TBV) isolated coaxial capacitor in a semiconductor die. In some embodiments, a cylindrical capacitor provided using the disclosed techniques may include, for example, a conductive TBV surrounded by a dielectric material and an outer conductor plate. The TBV and outer plate can be formed, for example, so as to be self-aligned with one another in a coaxial arrangement, in accordance with some embodiments. The disclosed capacitor may extend through the body of a host die such that its terminals are accessible on the upper and/or lower surfaces thereof. Thus, in some cases, the host die can be electrically connected with another die to provide a die stack or other three-dimensional integrated circuit (3D IC), in accordance with some embodiments. In some instances, the disclosed capacitor can be utilized, for example, to provide integrated capacitance in a switched-capacitor voltage regulator (SCVR).

Abstract translation: 公开了用于在半导体管芯中形成通孔通孔（TBV）隔离同轴电容器的技术。 在一些实施例中，使用所公开的技术提供的圆柱形电容器可以包括例如由介电材料和外导体板包围的导电TBV。 根据一些实施例，TBV和外板可以例如形成为以同轴布置彼此自对准。 所公开的电容器可以延伸穿过主模具的主体，使得其端子在其上表面和/或下表面上可接近。 因此，根据一些实施例，在一些情况下，主体管芯可以与另一个管芯电连接以提供管芯堆叠或其他三维集成电路（3D IC）。 在一些情况下，所公开的电容器可用于例如在开关电容器电压调节器（SCVR）中提供集成电容。

公开(公告)号：WO2014051977A1

公开(公告)日：2014-04-03

申请号：PCT/US2013/058796

申请日：2013-09-09

Applicant: INTEL CORPORATION

Inventor： ZILLMANN, Uwe ,  SCHAEFER, Andre ,  SARASWAT, Ruchir ,  KAMGAING, Telesphor ,  FISCHER, Paul, B. ,  DROEGE, Guido

IPC: H01L23/48

CPC classification number: G06F1/3296 ,  H01L2924/0002 ,  H05K1/0262 ,  H05K1/165 ,  Y02D10/172 ,  Y10T29/4913 ,  H01L2924/00

Abstract: Magnetically enhanced inductors integrated with microelectronic devices at chip-level. In embodiments, magnetically enhanced inductors include a through substrate vias (TSVs) with fill metal to carry an electrical current proximate to a magnetic layer disposed on a substrate through which the TSV passes. In certain magnetically enhanced inductor embodiments, a TSV fill metal is disposed within a magnetic material lining the TSV. In certain magnetically enhanced inductor embodiments, a magnetically enhanced inductor includes a plurality of interconnected TSVs disposed proximate to a magnetic material layer on a side of a substrate. In embodiments, voltage regulation circuitry disposed on a first side of a substrate is integrated with one or more magnetically enhanced inductors utilizing a TSV passing through the substrate. In further embodiments, integrated circuitry on a same substrate as the magnetically enhanced inductor, or on another substrate stacked thereon, completes the VR and/or is powered by the VR circuitry.

Abstract translation: 在芯片级与微电子器件集成的磁性增强型电感器。 在实施例中，磁增强电感器包括具有填充金属的贯穿衬底通孔（TSV），以承载靠近设置在TSV通过的衬底上的磁性层的电流。 在某些磁增强电感器实施例中，TSV填充金属设置在衬在TSV内的磁性材料内。 在某些磁增强电感器实施例中，磁增强电感器包括靠近基板一侧的磁性材料层设置的多个互连TSV。 在实施例中，设置在衬底的第一侧上的电压调节电路与利用穿过衬底的TSV的一个或多个磁增强电感器集成。 在另外的实施例中，在与磁增强电感器相同的衬底上或在其上堆叠的另一衬底上的集成电路完成VR和/或由VR电路供电。

公开(公告)号：WO2016043738A1

公开(公告)日：2016-03-24

申请号：PCT/US2014/056133

申请日：2014-09-17

Applicant: INTEL CORPORATION ,  LEE, Kevin J. ,  SARASWAT, Ruchir ,  ZILLMANN, Uwe ,  RAO, Valluri Bob ,  LUND-LARSEN, Tor ,  COWLEY, Nicholas P.

Inventor： LEE, Kevin J. ,  SARASWAT, Ruchir ,  ZILLMANN, Uwe ,  RAO, Valluri Bob ,  LUND-LARSEN, Tor ,  COWLEY, Nicholas P.

IPC: H01L27/04 ,  H01L21/60 ,  B81B7/02

CPC classification number: H04R1/04 ,  B81B7/02 ,  B81B2201/0257 ,  B81B2207/096 ,  B81C1/00158 ,  B81C2201/0132 ,  B81C2203/0109 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/27002 ,  H01L2224/27618 ,  H01L2224/27848 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/3201 ,  H01L2224/32058 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/83005 ,  H01L2224/83193 ,  H01L2224/83438 ,  H01L2224/8346 ,  H01L2224/83488 ,  H01L2224/8359 ,  H01L2224/83688 ,  H01L2224/83862 ,  H01L2224/92 ,  H01L2224/9222 ,  H01L2224/92225 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/161 ,  H01L2924/16151 ,  H01L2924/16152 ,  H01L2924/163 ,  H01L2924/166 ,  H04R1/406 ,  H04R19/005 ,  H04R19/04 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/01014 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2221/68304

Abstract: Embodiments of the present disclosure describe a die with integrated microphone device using through-silicon vias (TSVs) and associated techniques and configurations. In one embodiment, an apparatus includes an apparatus comprising a semiconductor substrate having a first side and a second side disposed opposite to the first side, an interconnect layer formed on the first side of the semiconductor substrate, a through-silicon via (TSV) formed through the semiconductor substrate and configured to route electrical signals between the first side of the semiconductor substrate and the second side of the semiconductor substrate, and a microphone device formed on the second side of the semiconductor substrate and electrically coupled with the TSV. Other embodiments may be described and/or claimed.

Abstract translation: 本公开的实施例描述了具有使用穿硅通孔（TSV）和相关联的技术和配置的集成麦克风设备的管芯。 在一个实施例中，一种装置包括一种装置，包括具有第一侧和与第一侧相对设置的第二侧的半导体衬底，形成在半导体衬底的第一侧上的互连层，形成的穿硅通孔（TSV） 通过半导体衬底并且被配置为在半导体衬底的第一侧和半导体衬底的第二侧之间布置电信号，以及形成在半导体衬底的第二侧上并与TSV电耦合的麦克风器件。 可以描述和/或要求保护其他实施例。

公开(公告)号：WO2016039860A1

公开(公告)日：2016-03-17

申请号：PCT/US2015/041526

申请日：2015-07-22

Applicant: INTEL CORPORATION

Inventor： COWLEY, Nicholas P. ,  SARASWAT, Ruchir ,  GOLDMAN, Richard J. ,  KAN, Chi Man ,  AITKEN, Matthew T. ,  PERRY, Colin L.

IPC: G06Q50/12 ,  G06Q50/22

CPC classification number: G01K13/00 ,  A47G21/02 ,  A47G2021/008 ,  A47G2200/186 ,  G01C19/00 ,  G01K2207/08 ,  G06Q30/016 ,  G06Q50/12

Abstract: Embodiments described herein relate generally to monitoring a dining session using smart smallwares. A smart smallware may sense usage or non-usage associated with a dining session of a customer. Based on the sensed non-usage of the smart smallware, the smart smallware may detect a period of inactivity. In response to the detected period of inactivity, the smart smallware may transmit an indication of the detected period of inactivity. This transmitted indication may cause an external monitoring device to notify a waitperson that a customer associated with that smart smallware may require attention. Other embodiments may be described and/or claimed.

Abstract translation: 本文所描述的实施例一般涉及使用智能小物件监视餐饮会话。 智能小型餐具可以感知与客户的餐饮会话相关联的使用或不使用。 基于感知到的智能小型软件的不使用，智能小型软件可以检测不活动的时间段。 响应于检测到的不活动时段，智能小型餐具可以发送检测到的不活动时段的指示。 该发送的指示可能导致外部监视设备通知等待人员，与该智能小型餐具相关联的客户可能需要注意。 可以描述和/或要求保护其他实施例。