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    APPARATUS AND METHOD FOR AN EFFICIENT 3D GRAPHICS PIPELINE
    4.
    发明申请
    APPARATUS AND METHOD FOR AN EFFICIENT 3D GRAPHICS PIPELINE 审中-公开
    用于高效3D图形管道的装置和方法

    公开(公告)号：WO2018052610A1

    公开(公告)日：2018-03-22

    申请号：PCT/US2017/046853

    申请日：2017-08-15

    Applicant: INTEL CORPORATION

    Inventor： AKENINE-MOLLER, Tomas G ,  TOTH, Robert M. ,  INSKO, Brent E. ,  DOYLE, Peter L. ,  SURTI, Prasoonkumar ,  MAIYURAN, Subramaniam ,  MUNKBERG, Carl Jacob ,  CLARBERG, Franz Petrik ,  HASSELGREN, Jon N.

    IPC: G06T15/00 ,  G06T1/20 ,  G06T1/60

    CPC classification number: G06T15/005 ,  G06T15/04 ,  G06T15/205 ,  G06T15/30 ,  G06T15/405 ,  G06T15/80 ,  G06T17/10 ,  G06T17/20 ,  G06T2210/12

    Abstract: A graphics processing apparatus and method are described. For example, one embodiment of a graphics processing apparatus comprises: an input assembler of a graphics pipeline to determine a first set of triangles to be drawn based on application-provided parameters; a depth buffer to store depth data related to the first set of triangles; a vertex shader to perform position-only vertex shading operations on the first set of triangles in response to an indication that the graphics pipeline is to initially operate in a depth-only mode; a culling and clipping module to read depth values from the depth buffer to identify those triangles in the first set of triangles which are fully occluded by other objects in a current frame and to generate culling data usable to cull occluded triangles, the culling and clipping module to associate the culling data with a replay token to be used to identify a subsequent rendering pass through the graphics pipeline; the input assembler, upon detecting the replay token in the subsequent rendering pass, to access the culling data associated therewith to remove culled triangles from the first set of triangles to generate a second set of triangles; the vertex shader to perform full vertex shading operations on the second set of triangles during the subsequent rendering pass, the replay token to be destroyed during or following the subsequent rendering pass.

    Abstract translation: 描述了一种图形处理装置和方法。 例如，图形处理设备的一个实施例包括：图形管线的输入组装器，用于基于应用提供的参数确定要绘制的第一组三角形; 深度缓冲器，用于存储与第一组三角形相关的深度数据; 顶点着色器，用于响应于所述图形管线将初始地在仅深度模式中操作的指示，对所述第一组三角形执行仅位置顶点着色操作; 剔除和剪切模块，用于从深度缓冲区中读取深度值以识别第一组三角形中被当前帧中的其他对象完全遮挡的那些三角形并且生成可用于剔除遮挡三角形的剔除数据，剔除和剪切模块 将所述剔除数据与重播令牌相关联以用于识别通过所述图形管线的后续渲染通道; 在随后的渲染过程中检测到重放令牌时，输入装配器访问与之关联的剔除数据以从第一组三角形中去除剔除的三角形以产生第二组三角形; 顶点着色器在随后的渲染过程中对第二组三角形执行完整的顶点着色操作，该重放令牌在后续渲染过程中或之后被销毁。

    METHOD AND APPARATUS FOR MULTI FORMAT LOSSLESS COMPRESSION
    5.
    发明申请
    METHOD AND APPARATUS FOR MULTI FORMAT LOSSLESS COMPRESSION 审中-公开

    公开(公告)号：WO2017172053A3

    公开(公告)日：2017-10-05

    申请号：PCT/US2017/017026

    申请日：2017-02-08

    Applicant: INTEL CORPORATION

    Inventor： APPU, Abhishek R. ,  SURTI, Prasoonkumar ,  AKIBA, Hiroshi

    IPC: G06T1/20 ,  G06T1/60

    Abstract: Embodiments provide for a graphics processing apparatus including a cache memory and logic coupled to the cache memory to compress color data output from the first cache memory. In one embodiment the cache memory is a render cache. In one embodiment the cache memory is a victim data cache. In one embodiment the first cache memory is a render cache coupled to a victim data cache and logic is configured to compress color data evicted from the render cache and the victim data cache. The compression can include a target compression ratio to which the data is to be compressed.

    OPTIMIZED DEPTH BUFFER CACHE APPARATUS AND METHOD
    6.
    发明申请
    OPTIMIZED DEPTH BUFFER CACHE APPARATUS AND METHOD 审中-公开
    优化的深度缓存缓存器和方法

    公开(公告)号：WO2016171817A1

    公开(公告)日：2016-10-27

    申请号：PCT/US2016/022796

    申请日：2016-03-17

    Applicant: INTEL CORPORATION

    Inventor： FARRELL, Robert L. ,  SURTI, Prasoonkumar ,  RANGANATHAN, Vasanth ,  SZERSZEN, Karol A.

    IPC: G06T1/60 ,  H04N13/00 ,  G06T15/08 ,  G06T19/20

    CPC classification number: G06T15/005

    Abstract: An apparatus and method are described for performing efficient depth test operations. For example, an apparatus in accordance with one embodiment comprises: a depth cache to store a plurality of cache lines containing depth data to be used for graphics processing operations; depth test logic to determine a current depth test function associated with a read operation and to read a cache line from a depth cache while there are still outstanding writes to the cache line if the read operation and write operation are associated with the same depth test function, the depth test logic to perform a first depth test using the data read from the cache line, the first depth test to fail or pass pixels based on a predicted range of depth values.

    Abstract translation: 描述了用于执行有效的深度测试操作的装置和方法。 例如，根据一个实施例的装置包括：深度缓存，用于存储包含要用于图形处理操作的深度数据的多个高速缓存行; 深度测试逻辑以确定与读取操作相关联的当前深度测试功能，并且如果读取操作和写入操作与相同深度测试功能相关联，则仍然存在对高速缓存行的未写入，则从深度缓存读取高速缓存行 深度测试逻辑，用于使用从高速缓存行读取的数据来执行第一深度测试，第一深度测试基于深度值的预测范围来失败或传递像素。

    EFFICIENT HARDWARE MECHANISM TO ENSURE SHARED RESOURCE DATA COHERENCY ACROSS DRAW CALLS
    7.
    发明申请
    EFFICIENT HARDWARE MECHANISM TO ENSURE SHARED RESOURCE DATA COHERENCY ACROSS DRAW CALLS 审中-公开
    有效的硬件机制，以确保共享资源数据的相似性

    公开(公告)号：WO2015199941A1

    公开(公告)日：2015-12-30

    申请号：PCT/US2015/034263

    申请日：2015-06-04

    Applicant: INTEL CORPORATION ,  SURTI, Prasoonkumar ,  NAVALE, Aditya ,  BOLES, Jeffery S.

    Inventor： SURTI, Prasoonkumar ,  NAVALE, Aditya ,  BOLES, Jeffery S.

    IPC: G06T1/20

    CPC classification number: G06T1/20 ,  G06T15/005 ,  G09G5/363 ,  G09G2360/08

    Abstract: Systems and methods may provide for receiving a plurality of signals from a software module associated with a shared resource such as, for example, an unordered access view (UAV). The plurality of signals may include a first signal that indicates whether a draw call accesses the shared resource, a second signal that indicates whether a boundary of the draw call has been reached, and a third signal that indicates whether the draw call has a coherency requirement. Additionally, a workload corresponding to the draw call may be selectively dispatched in a shader invocation based on the plurality of signals.

    Abstract translation: 系统和方法可以提供从与例如无序访问视图（UAV）等共享资源相关联的软件模块接收多个信号。 多个信号可以包括指示绘图呼叫是否访问共享资源的第一信号，指示绘制呼叫的边界是否已经到达的第二信号，以及指示绘制呼叫是否具有一致性要求的第三信号 。 此外，可以基于多个信号在着色器调用中选择性地调度与绘图调用相对应的工作量。

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