Abstract:
A multi-layered ceramic capacitor with at least one chip and with first base metal plates in a parallel spaced apart relationship and second base metal plates in a parallel spaced apart relationship wherein the first plates and second plates are interleaved. A dielectric is between the first base metal plates and said second base metal plates and the dielectric has a first coefficient of thermal expansion. A first termination is in electrical contact with the first plates and a second termination is in electrical contact with the second plates. Lead frames are attached to, and in electrical contact with, the terminations wherein the lead frames have a second coefficient of thermal expansion and the second coefficient of thermal expansion is higher than said first coefficient of thermal expansion. The lead frame is a non-ferrous material.