METHOD AND SYSTEM FOR PROVIDING PROCESS TOOL CORRECTABLES USING AN OPTIMZED SAMPLING SCHEME WITH SMART INTERPOLATION
    1.
    发明申请
    METHOD AND SYSTEM FOR PROVIDING PROCESS TOOL CORRECTABLES USING AN OPTIMZED SAMPLING SCHEME WITH SMART INTERPOLATION 审中-公开
    使用优化采样方案与智能插值提供过程工具可修正性的方法和系统

    公开(公告)号:WO2011103048A3

    公开(公告)日:2012-03-01

    申请号:PCT/US2011024689

    申请日:2011-02-14

    CPC classification number: H01L22/20 H01L2924/0002 H01L2924/00

    Abstract: The present invention may include performing a first measurement on a wafer of a first lot of wafers via an omniscient sampling process, calculating a first set of process tool correctables utilizing one or more results of the measurement performed via an omniscient sampling process, randomly selecting a set of field sampling locations of the wafer of a first lot of wafers, calculating a second set of process tool correctables by applying an interpolation process to the randomly selected set of field sampling locations, wherein the interpolation process utilizes values from the first set of process tool correctables for the randomly selected set of field sampling locations in order to calculate correctables for fields of the wafer of the first lot not included in the set of randomly selected fields, and determining a sub-sampling scheme by comparing the first set of process tool correctables to the second set of correctables.

    Abstract translation: 本发明可以包括通过无所不在的采样处理在第一批晶片的晶片上进行第一测量,利用通过全方位采样过程执行的一个或多个测量结果来计算第一组处理工具校正值,随机选择 第一批晶片的晶片的一组场采样位置,通过对随机选择的一组场采样位置应用内插处理来计算第二组处理工具可校正值,其中所述内插处理利用来自第一组处理的值 用于随机选择的一组场采样位置的工具可校正,以便计算不包括在随机选择的场的集合中的第一批的晶片的场的可校正性,以及通过比较第一组处理工具来确定子采样方案 可纠正到第二组可纠正的。

    METHOD AND SYSTEM FOR PROVIDING PROCESS TOOL CORRECTABLES
    2.
    发明申请
    METHOD AND SYSTEM FOR PROVIDING PROCESS TOOL CORRECTABLES 审中-公开
    用于提供处理工具可纠正的方法和系统

    公开(公告)号:WO2012015967A3

    公开(公告)日:2012-05-24

    申请号:PCT/US2011045603

    申请日:2011-07-27

    CPC classification number: G05B19/41875 G05B2219/32182 Y02P90/22

    Abstract: The present invention may include performing a first measurement process on a wafer of a lot of wafers, wherein the first measurement process includes measuring one or more characteristics of a plurality of targets distributed across one or more fields of the wafer, determining a set of process tool correctables for a residual larger than a selected threshold level utilizing a loss function, wherein the loss function is configured to fit a model for one or more process tools, as a function of field position, to one or more of the measured characteristics of the plurality of targets, wherein the set of process tool correctables includes one or more parameters of the model that act to minimize the difference between a norm of the residual and the selected threshold, and utilizing the determined process tool correctables to monitor or adjust one or more processes of the process tools.

    Abstract translation: 本发明可以包括在许多晶片的晶片上执行第一测量过程,其中第一测量过程包括测量分布在晶片的一个或多个场上的多个目标的一个或多个特性,确定一组过程 用于利用损失函数对于大于所选阈值水平的残差的工具可校正,其中,所述损失函数被配置为将一个或多个处理工具的模型作为场位置的函数拟合至所述测量特征中的一个或多个测量特征 多个目标,其中所述一组处理工具可校正包括所述模型的一个或多个参数,所述一个或多个参数用于最小化所述残差的标准与所选阈值之间的差异,并且利用所确定的处理工具可校正来监视或调整一个或多个 流程工具的流程。

    SUBSTRATE MATRIX TO DECOUPLE TOOL AND PROCESS EFFECTS
    3.
    发明申请
    SUBSTRATE MATRIX TO DECOUPLE TOOL AND PROCESS EFFECTS 审中-公开
    基板矩阵对工具和过程效应

    公开(公告)号:WO2009143200A3

    公开(公告)日:2010-03-04

    申请号:PCT/US2009044594

    申请日:2009-05-20

    Abstract: A method of characterizing a process by selecting the process to characterize, selecting a parameter of the process to characterize, determining values of the parameter to use in a test matrix, specifying an eccentricity for the test matrix, selecting test structures to be created in cells on a substrate, processing the substrate through the process using in each cell the value of the parameter as determined by the eccentric test matrix, measuring a property of the test structures in the cells, and developing a correlation between the parameter and the property.

    Abstract translation: 一种通过选择表征过程来表征过程的方法,选择过程的参数来表征,确定在测试矩阵中使用的参数的值,指定测试矩阵的偏心度,选择要在单元格中创建的测试结构 在基板上,通过在每个单元中使用由偏心测试矩阵确定的参数值来处理基板,测量单元中的测试结构的性质,以及发展参数与特性之间的相关性。

    METHOD AND SYSTEM FOR PROVIDING TOOL INDUCED SHIFT USING A SUB-SAMPLING SCHEME
    4.
    发明申请
    METHOD AND SYSTEM FOR PROVIDING TOOL INDUCED SHIFT USING A SUB-SAMPLING SCHEME 审中-公开
    使用子采样方案提供工具感应移位的方法和系统

    公开(公告)号:WO2012044702A2

    公开(公告)日:2012-04-05

    申请号:PCT/US2011053743

    申请日:2011-09-28

    CPC classification number: G03F7/70616

    Abstract: The present invention may include measuring tool induced shift (TIS) on at least one wafer of a lot of wafers via an omniscient sampling process, randomly generating a plurality of sub-sampling schemes, each of the set of randomly generated sub-sampling schemes having the same number of sampled fields, measuring TIS at each location of each of the randomly generated sub-sampling schemes, approximating a set of TIS values for each of the randomly generated sub-sampling schemes utilizing the TIS measurements from each of the randomly generated sub-sampling schemes, wherein each set of TIS values for each of the randomly generated sub-sampling schemes is calculated utilizing an interpolation process configured to approximate a TIS value for each location not included in a randomly generated sub-sampling scheme, and determining a selected sub-sampling scheme by comparing each of the calculated sets of TIS values to the measured TIS of the omniscient sampling process.

    Abstract translation: 本发明可以包括通过无所不在的采样过程在许多晶片的至少一个晶片上测量工具诱发偏移(TIS),随机产生多个子采样方案,所述随机生成的子采样方案中的每一个具有 相同数量的采样场,测量每个随机生成的子采样方案的每个位置处的TIS,利用来自随机生成的子单元中的每一个的TIS测量来近似每个随机生成的子采样方案的一组TIS值 采样方案,其中使用内插过程来计算随机生成的子采样方案中的每一个的每组TIS值,所述内插处理被配置为对未包括在随机生成的子采样方案中的每个位置近似TIS值,并且确定所选择的 通过将每个计算出的TIS值集合与全向采样过程的测量TIS进行比较,进行子采样方案。

    METHOD AND SYSTEM FOR PROVIDING PROCESS TOOL CORRECTABLES USING AN OPTIMZED SAMPLING SCHEME WITH SMART INTERPOLATION
    6.
    发明公开
    METHOD AND SYSTEM FOR PROVIDING PROCESS TOOL CORRECTABLES USING AN OPTIMZED SAMPLING SCHEME WITH SMART INTERPOLATION 审中-公开
    方法和系统提供PROZESSWERKZEUGKORRIGIERBARER使用优化的扫描方案智能插值

    公开(公告)号:EP2537180A4

    公开(公告)日:2016-05-04

    申请号:EP11745086

    申请日:2011-02-14

    CPC classification number: H01L22/20 H01L2924/0002 H01L2924/00

    Abstract: The present invention may include performing a first measurement on a wafer of a first lot of wafers via an omniscient sampling process, calculating a first set of process tool correctables utilizing one or more results of the measurement performed via an omniscient sampling process, randomly selecting a set of field sampling locations of the wafer of a first lot of wafers, calculating a second set of process tool correctables by applying an interpolation process to the randomly selected set of field sampling locations, wherein the interpolation process utilizes values from the first set of process tool correctables for the randomly selected set of field sampling locations in order to calculate correctables for fields of the wafer of the first lot not included in the set of randomly selected fields, and determining a sub-sampling scheme by comparing the first set of process tool correctables to the second set of correctables.

    Abstract translation: 本发明可以包括经由在全知采样处理的第一批晶圆的晶片上执行第一测量,计算第一组处理工具可校正值的利用通过在全知采样过程所执行的测量的一个或多个结果,随机地选择一个 集的第一批晶圆的晶片的场的采样位置的,通过施加到内插处理,以随机选择的组场采样位置的,worin内插处理计算第二组处理工具可校正值的利用来自所述第一组工艺的值 工具可校正值用于为了计算可校正值对未包括在所述一组随机选择的视野的第一批次的晶片的字段中的随机选择的组场采样位置的,和确定性采矿子采样方案,通过比较所述第一组处理工具的 可校正值到第二组可校正值的。

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