Dielectric resonator and filter
    1.
    发明专利

    公开(公告)号:GB2284942A

    公开(公告)日:1995-06-21

    申请号:GB9425244

    申请日:1994-12-14

    Abstract: A dielectric resonator comprises a dielectric block 301 with a first electrode 305 formed on a first surface 302 and a second electrode 304 formed within an inner conductive hole 303 extending from the surface opposite the first surface 302, towards but not reaching the first surface 302, such that the first and second electrodes 304, 305 face each other to form a coupling capacitor and a conductive layer formed on one or more of the remaining surfaces. The resonators may be combined to form a filter arrangement. The filter may include window and groove arrangements to adjust the coupling between the resonators. The inner conductive hole 303 may have a circular, elliptical or quadrilateral cross sectional shape. The first electrode 305 may extend to an edge of the dielectric block 301 to form a connection terminal allowing direct surface mounting on to a circuit board.

    Dielectric resonator and filter
    2.
    发明专利

    公开(公告)号:GB2284942B

    公开(公告)日:1997-06-18

    申请号:GB9425244

    申请日:1994-12-14

    Abstract: A dielectric resonator includes a dielectric block having an open surface at one of the surfaces thereof, the remaining surfaces being plated with a conductor. The dielectric block has an inner conductor hole formed at a surface of the dielectric block opposite to the open surface, the inner conductor hole extending a predetermined depth toward the open surface such that it does not perforate through the open surface. An electrode pattern is formed on the open surface such that it faces an end surface of the inner conductor hole, the electrode pattern being adapted to provide an input/output capacitor. The dielectric block has a coupling window formed on a predetermined portion of one of the surfaces of the dielectric block, except for the open surface and the surface formed with the inner conductor hole, at a position adjacent to one of the open surface and the surface formed with the inner conductor hole. The coupling window is free of the plated conductor and adapted to control a coupling degree of the resonator to another resonator. Other embodiments include integral type filters having resonators in a single dielectric block.

    OPTICAL WAVEGUIDE PLATFORM AND METHOD OF MANUFACTURING THE SAME
    3.
    发明授权
    OPTICAL WAVEGUIDE PLATFORM AND METHOD OF MANUFACTURING THE SAME 无效
    光波导平台及其制造方法

    公开(公告)号:KR100757233B1

    公开(公告)日:2007-09-10

    申请号:KR20060051511

    申请日:2006-06-08

    Abstract: An optical waveguide platform and a manufacturing method thereof are provided to prevent an alignment error generated due to mask alignment after an optical waveguide making process, by forming an aligning mark necessary for bonding of a flip chip during an optical waveguide core forming process. An optical waveguide platform manufacturing method comprises the steps of: stacking a lower clad layer and a center core layer(13) on a substrate(100) in order; forming an optical waveguide core and an aligning mark(13c) at the same time by patterning and etching the center core layer; depositing a silica upper clad layer on the substrate having the optical waveguide core and the aligning mark; forming a trench(17) on the upper clad layer by etching a predetermined region defining the mounting position of a semiconductor chip, while exposing the lower clad layer; forming a terrace(18) functioning as the center for vertical alignment of the semiconductor chip, at the position different from where an uneven part of the aligning mark is formed, on a predetermined region of the bottom of the trench; and producing UBM(Under Bump Metal)(19) forming a solder pad and an electric wire, on the bottom of the trench where the aligning mark and the terrace are not formed.

    Abstract translation: 提供了一种光波导平台及其制造方法,通过在光波导芯形成工艺期间形成用于结合倒装芯片所需的对准标记,防止在光波导制造工艺之后由于掩模取向而产生的对准误差。 光波导平台制造方法包括以下步骤:依次堆叠在基底(100)上的下覆盖层和中心芯层(13); 通过图案化和蚀刻中心芯层同时形成光波导芯和对准标记(13c); 在具有光波导芯体和对准标记的基板上沉积二氧化硅上覆盖层; 通过蚀刻限定半导体芯片的安装位置的预定区域,同时暴露下部包层,在上部包层上形成沟槽(17) 在所述沟槽的底部的预定区域上形成用作所述半导体芯片的垂直取向的中心的台阶(18),其位于与形成所述对准标记的不平坦部分不同的位置处; 并且在沟槽的底部形成不形成对准标记和露台的UBM(下凸块金属)(19)形成焊盘和电线。

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