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公开(公告)号：US10104817B1
公开(公告)日：2018-10-16
申请号：US15859982
申请日：2018-01-02
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Ting-Hao Lin , Chiao-Cheng Chang , Yung-Lin Chia
IPC: H05K9/00
Abstract: An EMI shielding device is provided. A first shielding layer is formed on a first surface of a first substrate, and a first through hole is formed through the first substrate. A second substrate is mounted in an opening of the first through hole, and a second shielding layer is formed on a surface of the second substrate. A conductive paste is mounted between the first substrate and the at least one second substrate to electrically connected the first shielding layer and the second shielding layer. The EMI shielding device is adopted to be mounted on a printed circuit board (PCB) by Surface Mount Technology. Therefore, the EMI shielding device may be firmly mounted on the PCB, and there is not any narrow gap that may leak electromagnetic radiation.
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公开(公告)号：US10720694B2
公开(公告)日：2020-07-21
申请号：US16175807
申请日：2018-10-30
Applicant: Kinsus Interconnect Technology Corp.
Inventor： Ting-Hao Lin , Yung-Lin Chia , Chiao-Cheng Chang
Abstract: An antenna carrier plate structure has a first circuit board and a second circuit board. The first circuit board has a first substrate and a conductive connector disposed in the first substrate. The conductive connector has two opposite connecting ends respectively protruding from two opposite surfaces of the first substrate. The second circuit board has a second substrate formed with a through hole, and a connecting plug is disposed in the through hole. One end of the connecting plug is formed with an engaging concave portion for engaging one end of the conductive connector of the first substrate. Therefore, each circuit board can be firmly fixed and electrically connected by engaging to form a multi-layer circuit board module, thereby avoiding joint tolerances during soldering and ensuring a correct connection of the joints.
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公开(公告)号：US20190014695A1
公开(公告)日：2019-01-10
申请号：US16115119
申请日：2018-08-28
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Ting-Hao Lin , Chiao-Cheng Chang , Yung-Lin Chia
IPC: H05K9/00
CPC classification number: H05K9/0024 , H05K9/003 , H05K9/0037 , H05K9/0088 , H05K9/0092
Abstract: An EMI shielding device is provided. A first shielding layer is formed on a first surface of a first substrate, and a first through hole is formed through the first substrate. A second substrate is mounted in an opening of the first through hole, and a second shielding layer is formed on a surface of the second substrate. A conductive paste is mounted between the first substrate and the at least one second substrate to electrically connected the first shielding layer and the second shielding layer. The EMI shielding device is adopted to be mounted on a printed circuit board (PCB) by Surface Mount Technology. Therefore, the EMI shielding device may be firmly mounted on the PCB, and there is not any narrow gap that may leak electromagnetic radiation.
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4.发明授权Method for manufacturing a circuit board with buried element having high density pin count and the circuit board structure 有权用于制造具有高密度引脚数的埋入元件的电路板和电路板结构的方法公开(公告)号：US09439292B1
公开(公告)日：2016-09-06
申请号：US14641016
申请日：2015-03-06
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Ting-Hao Lin , Yi-Fan Kao , Jaen-Don Lan , Yung-Lin Chia , An-Ping Tseng
CPC classification number: H05K3/064 , H01L23/5389 , H05K1/185 , H05K1/188 , H05K3/0008 , H05K3/108 , H05K3/305 , H05K3/425 , H05K2201/09563 , H05K2201/10674 , H05K2203/166
Abstract: A method for manufacturing a circuit board with a buried element having high density pin count, wherein a micro copper window formed in a first circuit by patterned dry film electroplating is easily controlled less than 50 μm so that the micro conduction holes formed after the laser drilling each has a diameter greatly shrunk less than 50 μm so as to highly increase density of the micro conduction holes, thereby facilitating in burial of the buried element with the high density pin count. Additionally, by disposing the micro conduction holes in the same elevation, optically aligning a fixing position for the buried element can be controlled precisely.
Abstract translation: 一种制造具有高密度引脚数的埋入元件的电路板的方法，其中通过图案化干电镀电镀形成在第一电路中的微铜窗容易控制在小于50μm，从而在激光钻孔之后形成的微导电孔 每个具有大大缩小到小于50μm的直径，从而高度增加微通孔的密度，从而便于以高密度引脚数掩埋埋入元件。 此外，通过将相同高度的微通孔设置在一起，可精确地控制掩埋元件的固定位置的光学对准。
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Patent Agency Ranking
5.发明授权公开(公告)号：US09301405B1
公开(公告)日：2016-03-29
申请号：US14604956
申请日：2015-01-26
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Ting-Hao Lin , Yi-Fan Kao , Jaen-Don Lan , Yu-Te Lu , Yung-Lin Chia , An-Ping Tseng
IPC: H01L21/4763 , H05K3/40 , H05K3/06 , H05K3/00 , H05K3/18 , H05K3/02 , H05K1/09 , H05K1/11 , H01L21/48
CPC classification number: H05K3/0035 , H01L21/4857 , H01L2924/01078 , H01L2924/014 , H05K1/115 , H05K3/007 , H05K3/064 , H05K3/421 , H05K3/429 , H05K2201/09536
Abstract: A method for manufacturing microthrough-hole includes electroplating a metal layer on a carrier plate, patterning the metal layer to form a first circuit having copper pads, covering the first circuit with a photoresist layer and not covering the copper window between two of the copper pads, etching the metal layer beneath the copper window and removing the photoresist layer, sequentially forming an insulation layer and a second circuit on the first circuit and the copper window, the second circuit layer having a stop pad corresponding to the copper window, removing the carrier plate, upward drilling through the insulation layer between the stop pad and the copper window to form a microthrough-hole beneath the stop pad, and forming a conductive layer in the microthrough-hole to form the microthrough-hole connecting the first and second circuits. The microthrough-hole and its occupied area is greatly reduced, thereby achieving high circuit density.
Abstract translation: 一种用于制造微通孔的方法包括在载体板上电镀金属层，图案化金属层以形成具有铜焊盘的第一电路，用光致抗蚀剂层覆盖第一电路，并且不覆盖两个铜焊盘之间的铜窗 蚀刻铜窗下方的金属层并除去光致抗蚀剂层，在第一电路和铜窗上依次形成绝缘层和第二电路，第二电路层具有对应于铜窗的停止焊盘，移除载体 通过止动垫和铜窗之间的绝缘层向上钻孔，以在止动垫下方形成微通孔，并在微通孔中形成导电层，形成连接第一和第二电路的微通孔。 微通孔及其占用面积大大降低，从而实现高电路密度。
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公开(公告)号：US10383265B2
公开(公告)日：2019-08-13
申请号：US16115119
申请日：2018-08-28
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Ting-Hao Lin , Chiao-Cheng Chang , Yung-Lin Chia
IPC: H05K9/00
Abstract: An EMI shielding device is provided. A first shielding layer is formed on a first surface of a first substrate, and a first through hole is formed through the first substrate. A second substrate is mounted in an opening of the first through hole, and a second shielding layer is formed on a surface of the second substrate. A conductive paste is mounted between the first substrate and the at least one second substrate to electrically connected the first shielding layer and the second shielding layer. The EMI shielding device is adopted to be mounted on a printed circuit board (PCB) by Surface Mount Technology. Therefore, the EMI shielding device may be firmly mounted on the PCB, and there is not any narrow gap that may leak electromagnetic radiation.
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公开(公告)号：US20180303012A1
公开(公告)日：2018-10-18
申请号：US15859982
申请日：2018-01-02
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Ting-Hao Lin , Chiao-Cheng Chang , Yung-Lin Chia
IPC: H05K9/00
Abstract: An EMI shielding device is provided. A first shielding layer is formed on a first surface of a first substrate, and a first through hole is formed through the first substrate. A second substrate is mounted in an opening of the first through hole, and a second shielding layer is formed on a surface of the second substrate. A conductive paste is mounted between the first substrate and the at least one second substrate to electrically connected the first shielding layer and the second shielding layer. The EMI shielding device is adopted to be mounted on a printed circuit board (PCB) by Surface Mount Technology. Therefore, the EMI shielding device may be firmly mounted on the PCB, and there is not any narrow gap that may leak electromagnetic radiation.
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公开(公告)号：US09901016B1
公开(公告)日：2018-02-20
申请号：US15488133
申请日：2017-04-14
Applicant: Kinsus Interconnect Technology Corp.
Inventor： Ting-Hao Lin , Chiao-Cheng Chang , Yung-Lin Chia
IPC: H05K9/00
CPC classification number: H05K9/0037 , H05K9/003
Abstract: An EMI shielding device is provided. A first shielding layer is formed on a first surface of a first substrate, and a first through hole is formed through the first substrate. A second substrate is mounted in an opening of the first through hole, and a second shielding layer is formed on a surface of the second substrate. A conductive paste is mounted between the first substrate and the at least one second substrate to electrically connected the first shielding layer and the second shielding layer. A protective layer, an antirust layer, and a shielding layer are sequentially mounted on the conductive paste. The EMI shielding device is mounted on a printed circuit board (PCB) by Surface Mount Technology. Therefore, the EMI shielding device may be firmly mounted on the PCB, and there is not any narrow gap that may leak electromagnetic radiation.
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9.发明申请METHOD FOR MANUFACTURING A CIRCUIT BOARD WITH BURIED ELEMENT HAVING HIGH DENSITY PIN COUNT AND THE CIRCUIT BOARD STRUCTURE 有权具有高密度PIN计数的电路板和电路板结构的电路板的制造方法公开(公告)号：US20160262267A1
公开(公告)日：2016-09-08
申请号：US14641016
申请日：2015-03-06
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Ting-Hao Lin , Yi-Fan Kao , Jaen-Don Lan , Yung-Lin Chia , An-Ping Tseng
CPC classification number: H05K3/064 , H01L23/5389 , H05K1/185 , H05K1/188 , H05K3/0008 , H05K3/108 , H05K3/305 , H05K3/425 , H05K2201/09563 , H05K2201/10674 , H05K2203/166
Abstract: A method for manufacturing a circuit board with a buried element having high density pin count, wherein a micro copper window formed in a first circuit by patterned dry film electroplating is easily controlled less than 50 μm so that the micro conduction holes formed after the laser drilling each has a diameter greatly shrunk less than 50 μm so as to highly increase density of the micro conduction holes, thereby facilitating in burial of the buried element with the high density pin count. Additionally, by disposing the micro conduction holes in the same elevation, optically aligning a fixing position for the buried element can be controlled precisely.
Abstract translation: 一种制造具有高密度引脚数的埋入元件的电路板的方法，其中通过图案化干电镀电镀形成在第一电路中的微铜窗容易控制在小于50μm，从而在激光钻孔之后形成的微导电孔 每个具有大大缩小到小于50μm的直径，从而高度增加微通孔的密度，从而便于以高密度引脚数掩埋埋入元件。 此外，通过将相同高度的微通孔设置在一起，可精确地控制掩埋元件的固定位置的光学对准。
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