公开(公告)号：WO2006011996A3

公开(公告)日：2007-04-19

申请号：PCT/US2005021047

申请日：2005-06-14

Applicant: LAM RES CORP ,  ADAMS YOKO YAMAGUCHI ,  STOJAKOVIC GEORGE ,  MILLER ALAN

Inventor： ADAMS YOKO YAMAGUCHI ,  STOJAKOVIC GEORGE ,  MILLER ALAN

IPC: C03C25/68 ,  C23F1/00

CPC classification number: H01J37/32862 ,  H01J37/32082 ,  H01L21/3065

Abstract: In a plasma processing system, including a plasma processing chamber, a method of optimizing the etch resistance of a substrate material is described. The method includes flowing pre-coat gas mixture into the plasma procesing chamber, wherein the pre-coat gas mixture has an affinity for a etchant gas flow mixture; striking a first plasma from the pre-coat gas mixture; and introducing a substrate comprising the substrate material. The method also includes flowing the etchant gas mixture into the plasma processing chamber; striking a second plasma from the etchant gas mixture; and etching the substrate with the second plasma. Wherein the first plasma creates a pre-coat residual on a set of exposed surfaces in the plasma processing chamber, and the etch resistance of the substrate material is maintained.

Abstract translation: 在包括等离子体处理室的等离子体处理系统中，描述了优化衬底材料的耐蚀刻性的方法。 该方法包括将预涂气体混合物流入等离子体处理室，其中预涂气体混合物对蚀刻剂气流混合物具有亲和性; 从预涂气体混合物中冲出第一个等离子体; 以及引入包括所述基板材料的基板。 该方法还包括使蚀刻剂气体混合物流入等离子体处理室; 从蚀刻剂气体混合物中冲击第二个等离子体; 并用第二等离子体蚀刻衬底。 其中第一等离子体在等离子体处理室中的一组暴露表面上产生预涂层残留物，并且保持基材材料的耐蚀刻性。

公开(公告)号：WO2009114120A3

公开(公告)日：2009-11-12

申请号：PCT/US2009001506

申请日：2009-03-10

Applicant: LAM RES CORP ,  FANG TONG ,  KIM YUNSANG ,  KIM KEECHAN ,  STOJAKOVIC GEORGE

Inventor： FANG TONG ,  KIM YUNSANG ,  KIM KEECHAN ,  STOJAKOVIC GEORGE

IPC: H01L21/3065 ,  H01L21/302

CPC classification number: H01L21/67028 ,  H01J37/32642 ,  H01L21/02087 ,  H01L21/3065

Abstract: A method of cleaning a bevel edge of a semiconductor substrate is provided. A semiconductor substrate is placed on a substrate support in a reaction chamber of a plasma processing apparatus. The substrate has a dielectric layer overlying a top surface and a bevel edge of the substrate, the layer extending above and below an apex of the bevel edge. A process gas is introduced into the reaction chamber and energized into a plasma. The bevel edge is cleaned with the plasma so as to remove the layer below the apex without removing all of the layer above the apex.

Abstract translation: 提供一种清洁半导体衬底的斜边缘的方法。 将半导体衬底放置在等离子体处理设备的反应室中的衬底支撑件上。 衬底具有覆盖衬底的顶表面和斜面边缘的介电层，该层在斜面边缘的顶点的上方和下方延伸。 将工艺气体引入反应室并通电为等离子体。 斜面边缘用等离子体清洁，以便除去顶点以下的层，而不会移除顶点上方的所有层。

公开(公告)号：SG188843A1

公开(公告)日：2013-04-30

申请号：SG2013015847

申请日：2009-03-10

Applicant: LAM RES CORP

Inventor： FANG TONG ,  KIM YUNSANG ,  KIM KEECHAN ,  STOJAKOVIC GEORGE

Abstract: CONTROL OF BEVEL ETCH FILM PROFILE USING PLASMA EXCLUSION ZONE RINGS LARGER THAN THE WAFER DIAMETERA method of cleaning a bevel edge of a semiconductor substrate is provided. A semiconductor substrate is placed on a substrate support in a reaction chamber of a plasma processing apparatus. The substrate has a dielectric layer overlying a top surface and a bevel edge of the substrate, the layer extending above and below an apex of the bevel edge. A process gas is introduced into the reaction chamber and energized into a plasma. The bevel edge is cleaned with the plasma so as to remove the layer below the apex without removing all of the layer above the apex.FIG. 1