公开(公告)号：GB2372150A

公开(公告)日：2002-08-14

申请号：GB0211288

申请日：2000-11-27

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BOULIN DAVID M ,  FARROW REGINALD C ,  KIZILYALLI ISIK C ,  MKRTCHYAN MASIS ,  LAYADI NACE

IPC: H01J37/304 ,  H01L23/544

Abstract: A method of forming a multi-layered semiconductor structure having substrate (20) comprises the steps of forming an alignment feature (60) in or on substrate (20), and aligning lithography mask (140) using alignment feature (60) with a Scattering with Angular Limitation in Projection Electron-beam Lithography (SCALPEL) tool (100) having an electron beam source (110) for directing an electron beam toward semiconductor structure (10). The alignment feature (60) is detected as it backscatters a greater amount of electrons than the surrounding substrate (20). This information may then be used to align lithography mask (140). The alignment feature (60) may include shallow trench (22, Fig. 1) containing silicon dioxide (30) and a high atomic number material (50) selected from tungsten, tantalum, cobalt, titanium, or the silicides and nitrides of these metals. The alignment feature (60) may be formed in a polysilicon layer on a silicon dioxide layer.

公开(公告)号：GB2372150B

公开(公告)日：2003-09-10

申请号：GB0211288

申请日：2000-11-27

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BOULIN DAVID M ,  FARROW REGINALD C ,  KIZILYALLI ISIK C ,  MKRTCHYAN MASIS ,  LAYADI NACE

IPC: H01J37/304 ,  H01L23/544

公开(公告)号：GB2363677B

公开(公告)日：2003-09-10

申请号：GB0028872

申请日：2000-11-27

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BOULIN DAVID M ,  FARROW REGINALD C ,  KILILYALLI ISIK C ,  MKRTCHYAN MASIS ,  LAYADI NACE

IPC: G03F7/20 ,  G03F9/00 ,  H01J37/304 ,  H01J37/305 ,  H01L21/027 ,  H01L23/544

Abstract: A multi-layered semiconductor structure having an alignment feature for aligning a lithography mask and that may be used in connection with a SCALPEL tool. The present invention is particularly well-suited for sub-micron CMOS technology devices and circuits, but is not limited thereto. The present invention advantageously permits use of an electron beam source for both alignment and exposure of a lithography mask on a semiconductor wafer. The present invention also advantageously enables the formation of an alignment feature early (i.e., zero-level) in the semiconductor device fabrication process.

公开(公告)号：GB2363677A

公开(公告)日：2002-01-02

申请号：GB0028872

申请日：2000-11-27

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BOULIN DAVID M ,  FARROW REGINALD C ,  KILILYALLI ISIK C ,  MKRTCHYAN MASIS ,  LAYADI NACE

IPC: G03F7/20 ,  G03F9/00 ,  H01J37/304 ,  H01J37/305 ,  H01L21/027 ,  H01L23/544

Abstract: A method of forming a multi-layered semiconductor structure having substrate (20) comprises the steps of forming an alignment feature (60) in or on substrate (20), and aligning lithography mask (140) using alignment feature (60) with a Scattering with Angular Limitation in Projection Electron-beam Lithography (SCALPEL) tool (100) having an electron beam source (110) for directing an electron beam toward semiconductor structure (10). The alignment feature (60) is detected as it backscatters a greater amount of electrons than the surrounding substrate (20). This information may then be used to align lithography mask (140). The alignment feature (60) may include shallow trench (22, Fig. 1) containing silicon dioxide (30) and a high atomic number material (50) selected from tungsten, tantalum, cobalt, titanium, or the silicides and nitrides of these metals. The alignment feature (60) may be formed in a polysilicon layer on a silicon dioxide layer.