VOICE ENCIPHERING CODER
    2.
    发明专利

    公开(公告)号:JP2000031941A

    公开(公告)日:2000-01-28

    申请号:JP16759799

    申请日:1999-06-15

    Abstract: PROBLEM TO BE SOLVED: To obtain a voice processor architecture which does not have to use an external cipher synchronous input, has minimum voice deterioration and also accomplishes improved confidentiality by including a block eneryptor (enciphering device) and a key (key) stream generator in a transmitter side and enciphering a voice bit that is encoded by it. SOLUTION: A class 1A bit (1st block) is supplied as an input to a block encryptor (enciphering device) 34 from a voice coder (encoder) 32 included in a transmitter 30, a class 1B bit (2nd block) is supplied as an input to an XOR operator 38 and a class 2B bit (3rd block) is supplied as an input to an XOR operator 40. The encryptor (enciphering device) 34 enciphers (encrypts) a plaintext of a block into a cipher text by using an inversely transformable encryption algorithm having a key (key) related to an intended receiver.

    3.
    发明专利
    未知

    公开(公告)号:DE69916931D1

    公开(公告)日:2004-06-09

    申请号:DE69916931

    申请日:1999-06-08

    Abstract: The present invention is an encrypting speech processor architecture that provides enhanced security without the use of external cryptosync and with minimal speech degradation. This is accomplished by incorporating a block encryptor (34) and a keystream generator (36) (instead of a fixed secret mask encryption scheme, such as those implemented in voice ciphers) for encrypting blocks of encoded speech bits at a transmitter side. The block encryptor (34) employs an invertible cryptographic algorithm and internal cryptosync to convert a first block of encoded speech bits into a first ciphertext block (output 34). The first ciphertext block (output 34) is used to generate a keystream (output 36), which is then used to encrypt a second ciphertext block.

    4.
    发明专利
    未知

    公开(公告)号:DE69916931T2

    公开(公告)日:2005-04-28

    申请号:DE69916931

    申请日:1999-06-08

    Abstract: The present invention is an encrypting speech processor architecture that provides enhanced security without the use of external cryptosync and with minimal speech degradation. This is accomplished by incorporating a block encryptor (34) and a keystream generator (36) (instead of a fixed secret mask encryption scheme, such as those implemented in voice ciphers) for encrypting blocks of encoded speech bits at a transmitter side. The block encryptor (34) employs an invertible cryptographic algorithm and internal cryptosync to convert a first block of encoded speech bits into a first ciphertext block (output 34). The first ciphertext block (output 34) is used to generate a keystream (output 36), which is then used to encrypt a second ciphertext block.

    6.
    发明专利
    未知

    公开(公告)号:BR9914229A

    公开(公告)日:2001-07-31

    申请号:BR9914229

    申请日:1999-06-09

    Abstract: The present invention is an encrypting speech processor architecture that provides enhanced security without the use of external cryptosync and with minimal speech degradation. This is accomplished by incorporating a block encryptor (34) and a keystream generator (36) (instead of a fixed secret mask encryption scheme, such as those implemented in voice ciphers) for encrypting blocks of encoded speech bits at a transmitter side. The block encryptor (34) employs an invertible cryptographic algorithm and internal cryptosync to convert a first block of encoded speech bits into a first ciphertext block (output 34). The first ciphertext block (output 34) is used to generate a keystream (output 36), which is then used to encrypt a second ciphertext block.

Patent Agency Ranking