1.
    发明专利
    失效

    公开(公告)号:JPH05343624A

    公开(公告)日:1993-12-24

    申请号:JP15325592

    申请日:1992-06-12

    Abstract: PURPOSE:To obtain a semiconductor integrated circuit in which a parasitic transistor is not generated, by making a current flow into a signal I/O terminal, when the base voltage of a PNP transistor is going to decrease to a voltage or lower at which a forward bias does not occur. CONSTITUTION:When the emitter voltage A of an NPN transistor 3 is 0.7V and the base voltage B is 1.4V, the NPN transistor 3 and a PNP transistor 4 turn on and a current flows. An NPN transistor 5 and a PNP transistor 6 turn off and a current scarcely flows. PNP transistors 4, 6 which are turned into diodes by connecting each collector with each base are connected in series with the transistor 3 and the transistor 5, respectively. Thereby a high voltage is prevented from inversely applied. Hence the voltage is clipped at 1.4V, and the base voltage does not become negative, so that a parasitic transistor is not generated. In the period (II), the base voltage is limitted at 0V, so that a semiconductor integrated circuit in which generation of a parasitic transistor is prevented can be realized.

    ELECTRONIC PART AND MANUFACTURE THEREFOR

    公开(公告)号:JPH11251503A

    公开(公告)日:1999-09-17

    申请号:JP5165198

    申请日:1998-03-04

    Abstract: PROBLEM TO BE SOLVED: To solder parts easily firmly, by depositing a metal layer made of Sn containing Bi less than predetermined in percent on an electrode lead wire to be connected to the outside. SOLUTION: A metal layer made of Sn containing by weight less than 4% Bi is deposited on an electrode lead wire 5 connected to the outside as an outermost metal layer 6. A semiconductor element is die-bonded on a Cu lead frame and is provided with a wiring connected to an external electrode. An underlayer Ni-plated film is formed on the electrode lead wire 5 to be connected to the outside of the semiconductor device subjected to plastic sealing and lead forming, and then Bi is deposited on the metal underlayer as an Sn-Bi alloy film. This can make it possible to easily mount electronic parts on a printed substrate or a circuit substrate with solder at a low temperature and to improve the reliability of the portion bonded with solder.

Patent Agency Ranking