公开(公告)号：JPH09230012A

公开(公告)日：1997-09-05

申请号：JP3670696

申请日：1996-02-23

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TANAKA TAKESHI

IPC: G01R33/02 ,  H01L43/02

Abstract: PROBLEM TO BE SOLVED: To provide a magnetic sensor in which the distance between a magnet and the magnetic sensing part of a magnetoelectric sensing element can be adjusted, and the magnet can be arranged so as to be positioned on an extended line penetrating the magnetic sensing part of the magnetoelectric sensing element and perpendicular to the magnetic sensing part loading face, even when the magnet is smaller than the recess of the backside of the magnetoelectric sensing element. SOLUTION: This magnetic sensor is provided with a magnetoelectric sensing element 32 having a magnetic sensing part 33, a sealing material 36 having a recess 37 on the behind face of the magnetic sensing part 33 and sealing the element 32, and a magnet 38 fitted to the recess 37, and the recess 37 is formed with symmetric staircase-like step parts 37a on both sides of the section so as to widen on the opening side, and the magnet 38 is fitted to the step parts 37a.

公开(公告)号：JPH05167064A

公开(公告)日：1993-07-02

申请号：JP33167891

申请日：1991-12-16

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： SHIMAMOTO KOJI ,  TANAKA TAKESHI ,  UEDA DAISUKE

IPC: H01L21/265 ,  H01L21/331 ,  H01L29/47 ,  H01L29/73 ,  H01L29/737 ,  H01L29/861 ,  H01L29/872

Abstract: PURPOSE:To enhance the breakdown strength of a junction for a p-n diode or a Schottky diode and the breakdown strength of a collector for a bipolar transistor. CONSTITUTION:Ions are implanted into a low-concentration region 3 around a Schottky junction 3a; after that, a heat treatment is executed at 300 deg.C or higher and 600 deg.C or lower. Thereby, a high-resistance region 2 whose depth from the surface is at least 100nm is formed. By this constitution, concentration of an electric field around a Schottky electrode 1 on the surface is relaxed, a leakage current in the high-resistance region 2 is reduced, and the breakdown strength of the Schottky junction 3a is enhanced up to a maximum breakdown strength which is decided by a semiconductor material.

公开(公告)号：JPH0456291A

公开(公告)日：1992-02-24

申请号：JP16721690

申请日：1990-06-25

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： YOSHIKAWA NORIYUKI ,  YOSHIKAWA AKIO ,  TANAKA TAKESHI

IPC: H01S5/042

Abstract: PURPOSE:To obtain a noise reduction device which is small in size, wide in matching bandwidth, stable in characteristics, and small in leakage electromagnetic wave by a method wherein the noise reduction device is provided with a chip integrated circuit where a matching circuit and a low-pass filter are monolithically molded with magnetic material into a package. CONSTITUTION:A matching circuit and a low-pass filter are monolithically molded with magnetic material into a chip integrated circuit. The matching circuit is composed of three or more elements such as a coil and a capacitor and has a band of + or -30 MHz centering on a center frequency.

公开(公告)号：JPH10163434A

公开(公告)日：1998-06-19

申请号：JP31738896

申请日：1996-11-28

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： FURUKAWA HIDETOSHI ,  FUKUI TAKESHI ,  TANAKA TAKESHI ,  UEDA DAISUKE

IPC: H01L27/06 ,  H01L21/06 ,  H01L21/8232 ,  H01L27/095

Abstract: PROBLEM TO BE SOLVED: To prevent electric mutual interference between electric elements, by forming an electric element on a buffer layer. SOLUTION: On a semiconductor substrare 1 constituted of semiinsulating GaAs, buffer layers 2 are formed, on which an field effect transistor 7 and an field effect transistor 8 are formed. The transistor 7 comprises an active layer 3, and a source electrode 4, a drain electrode 5 and a gate electrode 6 which are formed on the layer 3. The transistor 8 comprises the active layer 3, a source electrode 4, a drain electrode 5 and a gate electrode 6. In a semiconductor integrated circuit, the two field effect transistors 7, 8 are formed. The buffer layers 2 arranged between the active layers 3 under the transistors and the semiconductor substrate 1 are isolated from each other. Thereby electric interference between the field effect transistor 7 and the field effect transistor 8 can be prevented.

公开(公告)号：JPS62193284A

公开(公告)日：1987-08-25

申请号：JP3601486

申请日：1986-02-20

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： OTSUKI TATSUO ,  TANAKA TAKESHI ,  ASADA HIROAKI

IPC: H01L29/80

Abstract: PURPOSE:To prevent the gate length from being limited to an exposure resolving power and moreover, to lessen the parasitic resistance too by a method wherein two regions to show a conductive type different from one conductive type are formed in the surface of a semiconductor substrate of the one conductive type and the interval between the two regions is made wider in the vicinity of the surface of the substrate. CONSTITUTION:When a voltage is applied to a drain electrode 5 and a source electrode 3, current flows through a channel layer 1. Here, the length of the channel layer 1 is a difference between the diffusion depth of gate electrodes 2 and the diffusion depth of a drain layer 6. As a result, the channel length is controlled by diffusion only and the channel depth is the distance between the opposing gate layers 2, but this distance can be controlled utilizing a lateral diffusion. In brief, the channel length and the channel depth both can be controlled to an exposure resolving power or more and the current to run in the channel layer 1 is controlled by the voltage to be impressed on gate electrodes 4. The interval between the gate layers 2 and the drain layer 6 and the interval between the gate layers 2 and the source are in the interior of the substrate. Thereby, the parasitic resistance also becomes smaller without being subjected to the effect of surface depletion layers and so on.

公开(公告)号：JPS62155613A

公开(公告)日：1987-07-10

申请号：JP29680285

申请日：1985-12-27

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TANAKA TAKESHI ,  SHIMANO AKIO ,  OTSUKI TATSUO ,  TAKAGI HIROMITSU

IPC: H01L21/8234 ,  H01L27/08 ,  H01L27/088 ,  H01S5/026 ,  H01S5/042 ,  H03K3/03

Abstract: PURPOSE:To attain miniaturization and low cost by forming a high frequency component consisting of a ring oscillator without using a capacitor, a coil or a delay device and integrating the circuit in a monolithic way in the semiconductor integrated circuit for a high frequency oscillator used for an optical disk or a magnetic disk. CONSTITUTION:A ring oscillator 14 consists of BFL (buffered FET logic) inverters 1-5. A Schottky junction field effect transistor (hereinafter MESFET) 13 amplifies the signal. High frequency oscillation is caused by the ring oscillator 14 comprising the inverter circuits 1-5. Then the signal is amplified by the MESFET 13 and fed to a semiconductor laser from an output terminal. Further, there is a relation of fosc=1/2ntaupd (taupd is a delay time per one stage of inverter) between the oscillation frequency fosc and number of stages (n) of the inverters in the ring oscillator 14 in general and the oscillation frequency fosc is changed by varying the number of stages (n) of inverters.

公开(公告)号：JPS62155612A

公开(公告)日：1987-07-10

申请号：JP29680185

申请日：1985-12-27

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TANAKA TAKESHI ,  SHIMANO AKIO ,  OTSUKI TATSUO ,  TAKAGI HIROMITSU

IPC: H01L21/8234 ,  H01L27/08 ,  H01L27/088 ,  H01S5/026 ,  H01S5/042 ,  H03K3/03

Abstract: PURPOSE:To control an optical output without using a coil or a capacitor by constituting the titled circuit by a high frequency oscillation section and an output section having an output current function in the semiconductor integrated circuit of the high frequency oscillator used for an optical disk or a magnetic disk. CONSTITUTION:Buffered FET logic (BFL) inverters 1-5 form a ring oscillator 14. A signal is amplified by a Schottky gate FET (hereinafter MESFET) 13. The oscillation is caused by the ring oscillator 14 at first. Then the signal is amplified further by the MESFET 13 through one stage of a buffer amplifier and fed to a semiconductor laser from an output terminal. In sending the signal from the buffer amplifier to the MESFET 13, the Schottky diode 15 and the terminal 16 are used to change a bias voltage given to the terminal 16. Thus, the output current fed to the semiconductor laser is controlled.

公开(公告)号：JPS62142343A

公开(公告)日：1987-06-25

申请号：JP28362485

申请日：1985-12-17

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： SHIMANO AKIO ,  OTSUKI TATSUO ,  ASADA HIROAKI ,  TANAKA TAKESHI

IPC: H01L27/06 ,  H01L27/095 ,  H01L29/80

Abstract: PURPOSE:To control an output current and an output voltage, by connecting one terminal of a diode to the gate terminal of a field effect transistor, and applying a DC potential to the other terminal. CONSTITUTION:A pulse, whose high level voltage is VH and low level voltage is VL is applied to an input terminal 5. A forward rising voltage at a Schottky diode 7 is VF. A DC voltage, which is applied to a current control terminal 6, is VP1. When the potential at the input terminal is going to rise to a value higher than VP1+VF, a current flows through the diode 7 from the input terminal 5. Therefore the voltage is fixed at VP1+VF. Thus the pulse, which is applied to the gate terminal of a switching transistor 1 has a high level potential of VP1+VF and a low level potential of VL. The high level potential can be randomly changed by the potential VP1 at the control terminal 6. Thus the high level of the current pulse flowing a load 4 can be controlled by VP1.

公开(公告)号：JPH11168104A

公开(公告)日：1999-06-22

申请号：JP18376598

申请日：1998-06-30

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： FURUKAWA HIDETOSHI ,  NOMA JUNJI ,  TANAKA TAKESHI ,  ISHIDA HIDETOSHI ,  UEDA DAISUKE

IPC: H01L29/41 ,  H01L21/3205 ,  H01L21/338 ,  H01L21/66 ,  H01L21/768 ,  H01L23/48 ,  H01L23/52 ,  H01L29/812

Abstract: PROBLEM TO BE SOLVED: To improve yield of the manufacture of a through-hole electronic device and simplify a manufacturing process. SOLUTION: First, a source electrode 3 and a drain electrode 4 are formed, titanium and aluminum are successively deposited to form a gate electrode 5, and a FET is formed. After a photoresist film 12 is applied to the surface of a substrate 1 as an etching protective film, the substrate 1 is etched by using an opening 12a formed by a photolighographic method to form a hole 7. Then a conductive layer 10 is deposited to fill the hole 7, and a metal layer 11 is formed. After that, the rear of the substrate 1 is polished at least up to the hole 7 to have the conductive layer 10 exposed on the rear side of the substrate 1. Finally, rear metal film 9 is deposited over the entire rear surface of the substrate 1 to manufacture an electronic device.

公开(公告)号：JPH07273292A

公开(公告)日：1995-10-20

申请号：JP6333794

申请日：1994-03-31

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： UEDA TETSUZO ,  TANAKA TAKESHI ,  UEDA DAISUKE

IPC: H01F17/00 ,  H01L21/822 ,  H01L27/04

Abstract: PURPOSE:To obtain a semiconductor integrated circuit in which an inductor which has a large inductance value and a small series resistance value is formed in a small area part on a semiconductor substrate. CONSTITUTION:A metal interconnection 4 is formed on a semiconductor substrate 1. Oxide films 3, 5 which contain iron are arranged at the lower part, the left side, the right side and the upper part of the metal interconnection 4 so as to come into direct contact. Consequently, an induced electromotive force becomes large when a current is made to flow to the metal interconnection 4. As a result, an inductance value can be increased as compared with a case in which the oxide films 3, 5 do not exist. In addition, the total length of the metal interconnection 4 can be limited to be short, the resistance value of the metal interconnection 4 can be reduced, and the metal interconnection can be formed in a small area part on the semiconductor substrate 1.