公开(公告)号：DE69617893D1

公开(公告)日：2002-01-24

申请号：DE69617893

申请日：1996-07-17

Applicant: MICROCHIP TECH INC

Inventor： ALEXANDER E ,  HEWITT D

IPC: G11C16/06 ,  G11C7/10 ,  G11C8/04 ,  G11C16/20 ,  G11C16/26 ,  G11C7/00

Abstract: A sequential memory device having a read pipeline data structure for reading data from a bitline of a memory array of the device is disclosed. The read pipeline data structure includes at least one data path including a sense amp for sensing the logic level appearing on the bitline, a flip-flop for providing an output signal indicative of the data bits received on the bitline, and means for initializing the data path upon power up of the device such that the first data bit from the memory array is available for output from the device without the need and before the occurrence of a clock signal.

公开(公告)号：DE60021971D1

公开(公告)日：2005-09-22

申请号：DE60021971

申请日：2000-03-28

Applicant: MICROCHIP TECH INC

Inventor： SORRELLS PETER ,  ALEXANDER E ,  FUREY LEE ,  POULIN SHANNON

IPC: G08C17/00 ,  G01S13/75 ,  G01S13/76 ,  G01S13/79 ,  G06K19/07 ,  H04B1/59 ,  H04B5/02 ,  G01S13/02

Abstract: A radio frequency identification tag device having a sensor input which modifies a tag data word bitstream read by an interrogator/tag detector. The sensor input may be a switch contact(s), digital and/or analog. The sensor input may be voltage, current, pressure, temperature, resistance, acceleration, moisture, gas and the like. Power from the radio frequency interrogator/tag reader may be used to power the circuits of the radio frequency tag device, which in turn may supply power to any sensor connected thereto.

公开(公告)号：DE69518611T2

公开(公告)日：2001-05-03

申请号：DE69518611

申请日：1995-06-22

Applicant: MICROCHIP TECH INC

Inventor： ALEXANDER E

IPC: G11C17/00 ,  G06F13/38 ,  G11C7/10 ,  G11C16/02 ,  G11C16/06 ,  G11C7/00 ,  G06F1/10 ,  G06F1/12

Abstract: An I2C bus-compatible, serial EEPROM device is used in applications involving storage and serial transmission of configuration and control information for an intelligent peripheral device with which the EEPROM device is associated, for communication on a bus to a host device adapted to control the peripheral device. The EEPROM device has a memory array for storing data representing the configuration and control information. Two modes of data transmission are supported by the EEPROM device, and are alternately and selectively established according to whether data stored in the EEPROM array is to be read only, by sequential output onto the bus, or the array is also to be allowed to be written to. The arrangement ultimately allows intelligent interaction between the host device and the peripheral device. A separate clock line supplements the usual clock line and data line of an I2C bus to support the distinct and different modes, with clocking by the respective clock line for the established mode. A controlled multiplexer selectively connects the input clock according to a predetermined logic level transition on one of the two clock lines.

公开(公告)号：DE60021971T2

公开(公告)日：2006-05-18

申请号：DE60021971

申请日：2000-03-28

Applicant: MICROCHIP TECH INC

Inventor： SORRELLS PETER ,  ALEXANDER E ,  FUREY LEE ,  POULIN SHANNON

IPC: G01S13/02 ,  G08C17/00 ,  G01S13/75 ,  G01S13/76 ,  G01S13/79 ,  G06K19/07 ,  H04B1/59 ,  H04B5/02

Abstract: A radio frequency identification tag device having a sensor input which modifies a tag data word bitstream read by an interrogator/tag detector. The sensor input may be a switch contact(s), digital and/or analog. The sensor input may be voltage, current, pressure, temperature, resistance, acceleration, moisture, gas and the like. Power from the radio frequency interrogator/tag reader may be used to power the circuits of the radio frequency tag device, which in turn may supply power to any sensor connected thereto.

公开(公告)号：DE69518611D1

公开(公告)日：2000-10-05

申请号：DE69518611

申请日：1995-06-22

Applicant: MICROCHIP TECH INC

Inventor： ALEXANDER E

IPC: G11C17/00 ,  G06F13/38 ,  G11C7/10 ,  G11C16/02 ,  G11C16/06 ,  G11C7/00 ,  G06F1/10 ,  G06F1/12

Abstract: An I2C bus-compatible, serial EEPROM device is used in applications involving storage and serial transmission of configuration and control information for an intelligent peripheral device with which the EEPROM device is associated, for communication on a bus to a host device adapted to control the peripheral device. The EEPROM device has a memory array for storing data representing the configuration and control information. Two modes of data transmission are supported by the EEPROM device, and are alternately and selectively established according to whether data stored in the EEPROM array is to be read only, by sequential output onto the bus, or the array is also to be allowed to be written to. The arrangement ultimately allows intelligent interaction between the host device and the peripheral device. A separate clock line supplements the usual clock line and data line of an I2C bus to support the distinct and different modes, with clocking by the respective clock line for the established mode. A controlled multiplexer selectively connects the input clock according to a predetermined logic level transition on one of the two clock lines.