Abstract:
The present invention relates generally to functional pathway configurations at the interfaces between integrated circuits (ICs) and the circuit assemblies with which the ICs communicate. More particularly, the present invention relates generally to the functional pathway configuration at the interface between one or more semiconductor integrated circuit dice, including an IC package and the circuitry of a system wherein the integrated circuit dice is a digital signal controller. Even more particularly, the present invention relates to a 18, 28, 40, 44, 64 or 80 pin functional pathway configuration for the interface between the digital signal controller and the system in which it is embedded.
Abstract:
A device including a microcontroller fabricated on a semiconductor chip is used to control an LCD display of an external system intended to be controlled by the microcontroller. The microcontroller enters a sleep state in which it operates in a battery power conservation mode during periods of time when functional activity of the microcontroller is reduced. The microcontroller awakens from the sleep state for resumption of activity when such a period ends. Timing to the LCD is decoupled from the microcontroller's own internal clock when the independent internal on-chip clock, which may be an RC oscillator, is selected by the user of the device. This allows the chip to continue to drive the LCD display even though the microcontroller's internal clock has stopped during the sleep.
Abstract:
A microcontroller (50) chip (51) includes a charge pump with a switched-capacitor (83) that develops a plurality of discrete voltages. A switched-capacitor (83) charging circuit selectively charges a capacitor to produce successive charges individually retrievable from the capacitor. An LCD driver (173) selectively transmits the discrete operating voltage levels to activate the LCD (10) according to status of an external system under the control of the microcontroller (50). Voltage losses that may occur during the switched-capacitor (83) charging are compensated to maintain the levels of the discrete operating voltages free of decay. Compensation is achieved by overcharging the capacitor (83) by an amount substantially equivalent to the amount of voltage loss on the capacitor, using active feedback obtained from monitoring the charge on the capacitor.
Abstract:
An instruction set is provided that features ninety four instructions and various address modes to deliver a mixture of flexible micro-controller like instructions and specialized digital signal processor (DSP) instructions that execute from a single instruction stream.