公开(公告)号：WO2014070017A1

公开(公告)日：2014-05-08

申请号：PCT/NL2013/050787

申请日：2013-11-05

Applicant: MICRONIT MICROFLUIDICS B.V.

Inventor： VAN'T OEVER, Ronny ,  BLOM, Marko Theodoor ,  HANEVELD, Jeroen ,  OONK, Johannes ,  TIJSSEN, Peter

IPC: H01L21/48 ,  H01L23/14 ,  H01L21/683

CPC classification number: H01L21/76879 ,  B81C1/00095 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/49827 ,  H01L2221/68345 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention relates to a method for forming an electrically conductive via in a substrate and such a substrate comprising an electrically conductive, said method comprising the steps, to be performed in suitable sequence, of: a) providing a first substrate as said substrate; b) forming a through hole in said first substrate; c) providing a second substrate; d) bringing a first surface of said second substrate into contact with said first surface of said first substrate, such that said through hole in said first substrate is covered by said first surface of said second substrate; e) filling said through hole in said first substrate with an electrically conductive material by means of electroplating for forming said electrically conductive via, and f) removing said second substrate, wherein said first surface of said first substrate and said first surface of said second substrate each have a surface roughness R a of less than 2nm, preferably less than 1 nm, more preferably less than 0.5 nm, and in that in step (d) said first surface of said first substrate and said first surface of said second substrate are brought in direct contact with each other, such that a direct bond is formed there between.

Abstract translation: 本发明涉及一种用于在衬底中形成导电通孔的方法，并且这种衬底包括导电的所述方法，所述方法包括以适当顺序执行的以下步骤：a）提供作为所述衬底的第一衬底; b）在所述第一衬底中形成通孔; c）提供第二衬底; d）使所述第二基板的第一表面与所述第一基板的所述第一表面接触，使得所述第一基板中的所述通孔被所述第二基板的所述第一表面覆盖; e）通过用于形成所述导电通孔的电镀用导电材料填充所述第一衬底中的所述通孔，以及f）去除所述第二衬底，其中所述第一衬底的所述第一表面和所述第二衬底的所述第一表面 每个表面粗糙度R a小于2nm，优选小于1nm，更优选小于0.5nm，并且在步骤（d）中，使所述第一基板的所述第一表面和所述第二基板的所述第一表面带入 彼此直接接触，从而在其间形成直接粘结。

公开(公告)号：WO2008030088A2

公开(公告)日：2008-03-13

申请号：PCT/NL2007/000214

申请日：2007-08-31

Applicant: MICRONIT MICROFLUIDICS B.V. ,  VAN'T OEVER, Ronny ,  BLOM, Marko, Theodoor

Inventor： VAN'T OEVER, Ronny ,  BLOM, Marko, Theodoor

CPC classification number: B01L3/502715 ,  B01L3/502707 ,  B01L3/5635 ,  B01L2200/027 ,  B01L2200/0642 ,  B01L2300/0645

Abstract: The invention relates to an assembly comprising at least one microfluidic device and a mounting piece, this microfluidic device comprising at least one material layer and at least one first fluidic port, which first fluidic port is situated at least partially in an end surface of the material layer and which mounting piece comprises at least one fluidic component, wherein the mounting piece is coupled to the microfluidic device by means of first coupling means provided for this purpose such that the fluidic component is connected to the first fluidic port. The invention also relates to such a mounting piece. The invention further relates to a method for manufacturing such an assembly and a method for use thereof. What is essential is that external fluidic components, in particular reservoirs or wells, are not connected, as is usual, to ports in the 'upper surface' of a microchip, but to ports in an outer end or side surface thereof, and that more space thereby remains available on the 'upper surface' and 'lower surface' of the microchip, for instance for visual inspection or other operations, or that the 'upper surface' and 'lower surface' of the microchip can thereby be smaller and the device or the system can thus be given a more compact form. Furthermore, an additional process such as powder-blasting or drilling is then often no longer necessary.

Abstract translation: 本发明涉及包括至少一个微流体装置和安装件的组件，该微流体装置包括至少一个材料层和至少一个第一流体端口，该第一流体端口至少部分地位于材料的端面中 层，并且所述安装件包括至少一个流体部件，其中通过为此目的提供的第一联接装置将安装件联接到微流体装置，使得流体部件连接到第一流体端口。 本发明还涉及这种安装件。 本发明还涉及制造这种组件的方法及其使用方法。 重要的是，外部流体组分，特别是储存器或井，不像通常那样连接到微芯片的“上表面”中的端口，而是连接到其外端或侧表面中的端口，并且更多 因此，在微芯片的“上表面”和“下表面”上保持可用的空间，例如用于目视检查或其他操作，或者微芯片的“上表面”和“下表面”可以更小，并且该装置 或者可以给予系统更紧凑的形式。 此外，通常不再需要附加的过程，例如粉末喷射或钻孔。

公开(公告)号：WO2009048321A2

公开(公告)日：2009-04-16

申请号：PCT/NL2008/000217

申请日：2008-10-03

Applicant: MICRONIT MICROFLUIDICS B.V. ,  VAN'T OEVER, Ronny ,  BLOM, Marko, Theodoor ,  OONK, Johannes

Inventor： VAN'T OEVER, Ronny ,  BLOM, Marko, Theodoor ,  OONK, Johannes

IPC: B81C1/00

CPC classification number: B81C1/00119 ,  B81B2203/0376 ,  B81C1/00103 ,  B81C2201/0146

Abstract: Methods for manufacturing a microstructure, wherein use is made of powder blasting and/or etching and a single mask layer with openings and structures of varying dimensions, characterized in that the mask layer at least at one given point in time has been wholly worn away within at least one region by mask erosion while the microstructure is not yet wholly realized. Use can be made of a combination of 'vertical' erosion, i.e. parallel to the thickness direction, and 'horizontal' erosion, i.e. perpendicularly of the thickness direction, of the mask layer. The horizontal mask erosion occurs at the edges of the mask structure. By selecting the size of the mask openings and the mask structures in a correct manner the mask layer in a region with smaller mask structures will be fully worn away at a given point in time, while in another region with larger structures the mask layer still has sufficient thickness to serve as protection against the powder blasting or etching.

Abstract translation: 用于制造微结构的方法，其中使用粉末喷射和/或蚀刻以及具有不同尺寸的开口和结构的单个掩模层，其特征在于，所述掩模层至少在一个给定点 随着时间的推移，在至少一个区域内被掩模侵蚀完全磨损，而微观结构尚未完全实现。 可以使用“垂直”侵蚀（即平行于厚度方向）和掩模层的“水平”侵蚀（即垂直于厚度方向）的组合。 水平掩模腐蚀发生在掩模结构的边缘处。 通过以正确的方式选择掩模开口和掩模结构的大小，具有较小掩模结构的区域中的掩模层将在给定时间点完全磨损，而在具有较大结构的另一区域中，掩模层仍然具有 足够的厚度以防止粉末喷射或蚀刻。

公开(公告)号：WO2009002152A1

公开(公告)日：2008-12-31

申请号：PCT/NL2008/000156

申请日：2008-06-23

Applicant: MICRONIT MICROFLUIDICS B.V. ,  VAN'T OEVER, Ronny ,  BLOM,Marko, Theodoor ,  BUESINK, Wilfred

Inventor： VAN'T OEVER, Ronny ,  BLOM,Marko, Theodoor ,  BUESINK, Wilfred

IPC: B01L9/00

CPC classification number: B01L3/502715 ,  B01L3/565 ,  B01L9/527 ,  B01L2200/025 ,  B01L2200/027 ,  B01L2300/0816 ,  Y10T29/49945 ,  Y10T29/5367 ,  Y10T29/53678 ,  Y10T29/53709 ,  Y10T29/53783 ,  Y10T29/53943 ,  Y10T29/53983 ,  Y10T29/53987 ,  Y10T29/53996

Abstract: A system for fluidic coupling and uncoupling of fluidic conduits (2,2') and a microfluidic chip (3), wherein the fluidic conduits are connected mechanically to a first structural part (7) and the microfluidic chip is carried by a second structural part (8), which structural parts are moved according to the invention perpendicularly toward and away from each other by means of a mechanism (4) provided for this purpose. Outer ends of the fluidic conduits can thus be moved over a determined distance substantially perpendicularly to an outer surface of the microfluidic chip and connecting openings present in the outer surface of the microfluidic chip, this enabling accurate realization of fluidic couplings and uncouplings without the occurrence of undesirable moments of force and with a minimal risk of damage to the fluidic conduits or the connecting openings. With such a system requirements which can be set in respect of convenience of use, speed of operation, temperature resistance, sealing, chemical resistance, reproducibility and so forth, can be fulfilled.

Abstract translation: 一种用于流体连接和解耦流体导管（2,2'）和微流体芯片（3）的系统，其中流体导管机械地连接到第一结构部件（7），并且微流体芯片由第二结构部件 （8），根据本发明，结构部件通过为此目的设置的机构（4）垂直地彼此移动并远离彼此。 因此，流体导管的外端可以基本上垂直于微流体芯片的外表面确定的距离和存在于微流体芯片的外表面中的连接开口移动，这使得能够精确地实现流体耦合和解耦，而不会发生 不期望的力矩和对流体导管或连接开口的破坏风险最小。 可以实现在使用方便性，操作速度，耐温性，密封性，耐化学性，再现性等方面可以设定的这种系统要求。

公开(公告)号：WO2003051765A2

公开(公告)日：2003-06-26

申请号：PCT/NL2002/000850

申请日：2002-12-19

Applicant: MICRONIT MICROFLUIDICS B.V. ,  VAN'T OEVER, Ronny

Inventor： VAN'T OEVER, Ronny

IPC: B81C1/00

CPC classification number: B81C1/00888

Abstract: The present invention relates to a method for dividing a substrate into a number of individual chip parts, comprising the steps of: forming a number of chip parts in the substrate, comprising, for each chip part, of arranging recesses in the substrate for containing fluid; arranging one or more breaking grooves in the substrate along individual chip parts; applying mechanical force to the substrate to break the substrate along the breaking grooves. The invention also relates to a substrate as well as a chip part.

Abstract translation: 本发明涉及一种将基板分割为多个单独的芯片部件的方法，包括以下步骤：在基板中形成多个芯片部件，每个芯片部分包括在基板中设置用于容纳流体的凹槽 沿着各个芯片部分沿着单个芯片部分布置一个或多个断裂槽到基板上，以沿着断裂槽破坏基板。 本发明还涉及基板以及芯片部分。

公开(公告)号：EP2915188A1

公开(公告)日：2015-09-09

申请号：EP13801864.3

申请日：2013-11-05

Applicant: Micronit Microfluidics B.V.

Inventor： VAN'T OEVER, Ronny ,  BLOM, Marko Theodoor ,  HANEVELD, Jeroen ,  OONK, Johannes ,  TIJSSEN, Peter

IPC: H01L21/48 ,  H01L23/14 ,  H01L21/683

Abstract: A method for forming an electrically conductive via in a substrate that includes the steps of: forming a through hole in a first substrate; bringing a first surface of a second substrate into contact with the first surface of the first substrate, such that the through hole in the first substrate is covered by the first surface of the second substrate; filling the through hole in the first substrate with an electrically conductive material by electroplating to form the electrically conductive via, and removing the second substrate, wherein the first surface of the first and the second substrate each have a surface roughness Ra of less than 2 nm, preferably less than 1 nm, more preferably less than 0.5 nm, and the first surface of the first and the second substrate are brought in direct contact with each other, such that a direct bond is formed there between.

Abstract translation: 本发明涉及一种用于在衬底中形成导电通孔的方法，并且这种衬底包括导电的方法，所述方法包括以适当顺序执行的步骤：a）提供作为所述衬底的第一衬底; b）在所述第一衬底中形成通孔; c）提供第二基底; d）使所述第二基板的第一表面与所述第一基板的所述第一表面接触，使得所述第一基板中的所述通孔被所述第二基板的所述第一表面覆盖; e）通过用于形成所述导电通孔的电镀用导电材料填充所述第一衬底中的所述通孔，以及f）去除所述第二衬底，其中所述第一衬底的所述第一表面和所述第二衬底的所述第一表面 每个表面粗糙度R a小于2nm，优选小于1nm，更优选小于0.5nm，并且在步骤（d）中，所述第一衬底的所述第一表面和所述第二衬底的所述第一表面是 导致彼此直接接触，从而在其间形成直接粘结。

公开(公告)号：EP2167233B1

公开(公告)日：2013-01-23

申请号：EP08766729.1

申请日：2008-06-23

Applicant: Micronit Microfluidics B.V.

Inventor： VAN'T OEVER, Ronny ,  BLOM,Marko, Theodoor ,  BUESINK, Wilfred

IPC: B01L9/00

CPC classification number: B01L3/502715 ,  B01L3/565 ,  B01L9/527 ,  B01L2200/025 ,  B01L2200/027 ,  B01L2300/0816 ,  Y10T29/49945 ,  Y10T29/5367 ,  Y10T29/53678 ,  Y10T29/53709 ,  Y10T29/53783 ,  Y10T29/53943 ,  Y10T29/53983 ,  Y10T29/53987 ,  Y10T29/53996

公开(公告)号：EP2063987B1

公开(公告)日：2015-11-04

申请号：EP07808512.3

申请日：2007-08-31

Applicant: Micronit Microfluidics B.V.

Inventor： VAN'T OEVER, Ronny ,  BLOM, Marko, Theodoor

IPC: B01L3/00

CPC classification number: B01L3/502715 ,  B01L3/502707 ,  B01L3/5635 ,  B01L2200/027 ,  B01L2200/0642 ,  B01L2300/0645

公开(公告)号：EP2207749B1

公开(公告)日：2015-05-20

申请号：EP08838017.5

申请日：2008-10-03

Applicant: Micronit Microfluidics B.V.

Inventor： VAN'T OEVER, Ronny ,  BLOM, Marko, Theodoor ,  OONK, Johannes

IPC: B81C1/00

CPC classification number: B81C1/00119 ,  B81B2203/0376 ,  B81C1/00103 ,  B81C2201/0146

公开(公告)号：EP2207749A2

公开(公告)日：2010-07-21

申请号：EP08838017.5

申请日：2008-10-03

Applicant: Micronit Microfluidics B.V.

Inventor： VAN'T OEVER, Ronny ,  BLOM, Marko, Theodoor ,  OONK, Johannes

IPC: B81C1/00

CPC classification number: B81C1/00119 ,  B81B2203/0376 ,  B81C1/00103 ,  B81C2201/0146

Abstract: Methods for manufacturing a microstructure, wherein use is made of powder blasting and/or etching and a single mask layer with openings and structures of varying dimensions, characterized in that the mask layer at least at one given point in time has been wholly worn away within at least one region by mask erosion while the microstructure is not yet wholly realized. Use can be made of a combination of 'vertical' erosion, i.e. parallel to the thickness direction, and 'horizontal' erosion, i.e. perpendicularly of the thickness direction, of the mask layer. The horizontal mask erosion occurs at the edges of the mask structure. By selecting the size of the mask openings and the mask structures in a correct manner the mask layer in a region with smaller mask structures will be fully worn away at a given point in time, while in another region with larger structures the mask layer still has sufficient thickness to serve as protection against the powder blasting or etching.