公开(公告)号：EP2073272A4

公开(公告)日：2013-08-14

申请号：EP07791105

申请日：2007-07-20

Applicant: OMRON TATEISI ELECTRONICS CO

Inventor： KASAI TAKASHI ,  HORIMOTO YASUHIRO ,  KATO FUMIHITO ,  MUNECHIKA MASAKI ,  WAKABAYASHI SHUICHI ,  TAKAHASHI TOSHIYUKI ,  INUGA MASAYUKI

IPC: B81C1/00 ,  H04R19/04

CPC classification number: B81C1/00182 ,  B81B2201/0257 ,  B81B2201/0285 ,  B81B2203/0127 ,  B81B2203/0353 ,  H04R19/005 ,  H04R19/04

Abstract: A protective film (20) of an SiO2 thin film is formed on a front surface of an Si substrate (12), and a part of the protective film (20) is removed to form an etching window (22). A sacrifice layer (23) of polycrystalline Si is formed in the etching window (22). A protective film (24) of SiO2 is formed on the front surface of the Si substrate (12) from the top of the sacrifice layer (23), and a thin film (13) as an element formed of polycrystalline Si is further formed on the protective film (24). A backside etching window (26) is opened in a protective film (21) on the back side of the Si substrate (12). The Si substrate (12) is soaked in TMAH to perform crystal anisotropic etching in the Si substrate (12) through the backside etching window (26) to provide a through-hole (14) in the Si substrate (12).; When the sacrifice layer (23) is exposed to the interior of the through-hole (14), the sacrifice layer (23) is etching-removed to provide a gap (19) between the protective film (24) and the Si substrate (12) and crystal anisotropic etching of the Si substrate (12) is carried out from its front side and backside.