公开(公告)号：ZA201107846B

公开(公告)日：2012-09-26

申请号：ZA201107846

申请日：2011-10-26

Applicant: QUALCOMM INC

Inventor： LEWIS ALAN G ,  CHUI CLARENCE ,  TODOROVICH MARK M ,  MIGNARD MARC M ,  CUMMINGS WILLIAM ,  VAN LIER WILHELMUS JOHANNES ROBERTUS

IPC: G09G20060101

公开(公告)号：CA2616268A1

公开(公告)日：2007-02-01

申请号：CA2616268

申请日：2006-07-20

Applicant: QUALCOMM INC

Inventor： CHUI CLARENCE ,  CHUNG WONSUK ,  GANTI SURYA PRAKASH ,  KOTHARI MANISH ,  MILES MARK W ,  SAMPSELL JEFFREY B ,  SASAGAWA TERUO

IPC: B81B3/00 ,  G02B26/00

Abstract: Embodiments of MEMS devices comprise a conductive movable layer spaced apart from a conductive fixed layer by a gap, and supported by rigid support structures, or rivets, overlying depressions in the conductive movable layer , or by posts underlying depressions in the conductive movable layer. In certa in embodiments, portions of the rivet structures extend through the movable lay er and contact underlying layers. In other embodiments, the material used to fo rm the rigid support structures may also be used to passivate otherwise exposed electrical leads in electrical connection with the MEMS devices, protecting the electrical leads from damage or other interference.

公开(公告)号：IN1542MUN2013A

公开(公告)日：2015-06-12

申请号：IN1542MUN2013

申请日：2013-08-12

Applicant: QUALCOMM INC

Inventor： LAN JE HSIUNG ,  NOWAK MATTHEW MICHAEL ,  GOUSEV EVGENI P ,  KIM JONGHAE ,  CHUI CLARENCE

IPC: H01L21/02 ,  H01G4/012 ,  H01L29/94

Abstract: Higher capacitance density is achieved by increasing a surface area of a capacitor. A larger surface area may be obtained by forming isotropic ball shapes (a concave surface) in the trenches on the semiconductor die. The concave surfaces are fabricated by depositing bilayers of amorphous silicon and silicon oxide. Openings are patterned in the silicon oxide hard mask for trenches. The openings are transferred to the amorphous silicon layers through isotropic etching to form concave surfaces. Conducting insulating and conducting layers are deposited on the concave surfaces of the trenches by atomic layer deposition.

公开(公告)号：BRPI0612997A2

公开(公告)日：2010-12-14

申请号：BRPI0612997

申请日：2006-07-20

Applicant: QUALCOMM INC

Inventor： CHUI CLARENCE ,  CHUNG WONSUK ,  GANTI SURYA PRAKASH ,  KOTHARI MANISH ,  MILES MARK W ,  SASAGAWA TERUO ,  SAMPSELL JEFFREY B

IPC: B81B3/00 ,  G02B26/00

Abstract: Embodiments of MEMS devices comprise a conductive movable layer spaced apart from a conductive fixed layer by a gap, and supported by rigid support structures, or rivets, overlying depressions in the conductive movable layer, or by posts underlying depressions in the conductive movable layer. In certain embodiments, both rivets and posts may be used. In certain embodiments, these support structures are formed from rigid inorganic materials, such as metals or oxides. In certain embodiments, etch barriers may also be deposited to facilitate the use of materials in the formation of support structures which are not selectively etchable with respect to other components within the MEMS device.

公开(公告)号：MX2007013732A

公开(公告)日：2008-03-14

申请号：MX2007013732

申请日：2006-05-02

Applicant: QUALCOMM INC

Inventor： STEWART RICHARD A ,  CHUI CLARENCE ,  HASTINGS ROBERT S

IPC: G09G3/34

Abstract: Se describen metodos para escribir datos de pantalla a elementos de pantalla de MEMS que estan configurados para minimizar la acumulacion de carga y envejecimiento diferencial. De manera simultanea a la escritura de hileras de datos de imagen, se efectua una operacion de pre-escritura en una siguiente hilera. La operacion de pre-escritura escribe ya sea datos de imagen o el inverso de los datos de imagen a la siguiente hilera. En algunas modalidades, la seleccion entre la escritura de datos de imagen y escritura de datos de imagen inversos se efectua de manera aleatoria o pseudo-aleatoria.

公开(公告)号：WO2007139651A2

公开(公告)日：2007-12-06

申请号：PCT/US2007010507

申请日：2007-04-30

Applicant: QUALCOMM INC ,  SAMPSELL JEFFREY BRIAN ,  CHUI CLARENCE ,  GALLY BRIAN J

Inventor： SAMPSELL JEFFREY BRIAN ,  CHUI CLARENCE ,  GALLY BRIAN J

CPC classification number: G02B26/001 ,  G02B26/0841 ,  H05K5/0017 ,  Y10T29/49826

Abstract: Two-sided, back-to-back displays (100) are formed by sealing the backplates (130, 230) of two displays (110, 210) against one another. Mechanical parameters of the backplates (130, 230), e.g., stiffness and strength, do not meet the requirements for standalone one-sided displays which are otherwise similar to the two displays (110, 210). However, when sealed against one another, the backplates (130, 230) reinforce each other to meet or exceed the requirements for both one-sided and two-sided displays. The presence of backplates (130, 230) on each of the constituent one-sided displays (110, 210) allows one or both of those displays (110, 210) to be individually tested, thereby increasing the production yield of the back-to-back displays (100). The display elements (150) of the displays (110, 210) can comprise interferometric modulators.

Abstract translation: 通过将两个显示器（110,210）的背板（130,210）彼此密封来形成双面背对背显示器（100）。 背板（130,230）的机械参数，例如刚度和强度，不符合另外类似于两个显示器（110,210）的独立单面显示器的要求。 然而，当彼此密封时，背板（130,230）彼此加强以满足或超过单面和双面显示器的要求。 每个组成单面显示器（110,210）上的背板（130,230）的存在允许单独测试这些显示器（110,210）中的一个或两个，从而提高了回 -back显示（100）。 显示器（110,210）的显示元件（150）可以包括干涉式调制器。

公开(公告)号：WO2008005108A2

公开(公告)日：2008-01-10

申请号：PCT/US2007011811

申请日：2007-05-16

Applicant: QUALCOMM INC ,  CHUI CLARENCE ,  LEWIS ALAN ,  MIGNARD MARC M

Inventor： CHUI CLARENCE ,  LEWIS ALAN ,  MIGNARD MARC M

CPC classification number: G09G3/3466 ,  G02B26/001 ,  G09G2310/0218 ,  G09G2310/0267 ,  G09G2310/06 ,  G09G2330/021

Abstract: A display array which can reduce the row connections between the display and the driver circuit and methods of manufacturing and operating the same are disclosed. In one embodiment, a display device comprises an array of MEMS display elements and a plurality of voltage dividers coupled to the array and configured to provide row output voltages to drive the array, wherein each row is connected to at least two inputs joined by a voltage divider.

Abstract translation: 公开了一种可以减少显示器和驱动器电路之间的行连接的显示阵列及其制造和操作方法。 在一个实施例中，显示装置包括MEMS显示元件阵列和耦合到阵列并配置成提供行输出电压以驱动阵列的多个分压器，其中每行连接到至少两个通过电压 分频器。

公开(公告)号：WO2007081547A2

公开(公告)日：2007-07-19

申请号：PCT/US2006049148

申请日：2006-12-22

Applicant: QUALCOMM INC ,  KOTHARI MANISH ,  KOGUT LIOR ,  CHUI CLARENCE

Inventor： KOTHARI MANISH ,  KOGUT LIOR ,  CHUI CLARENCE

CPC classification number: G01L5/0047 ,  G02B26/001

Abstract: The invention comprises systems and methods determining residual stress such as that found in interferometric modulators. In one example, a test unit can be configured to indicate residual stress in a film by interferometrically modulating light indicative of an average residual stress in two orthogonal directions of the substrate. The test unit can include a reflective membrane attached to the substrate where membrane is configured as a parallelogram with at least a portion of each side attached to the substrate, and an interferometric cavity formed between a portion of the membrane and a portion of the substrate, and where the membrane is configured to deform based on the residual stress of in the film and modulate light indicative of the amount of membrane deformation.

Abstract translation: 本发明包括确定残余应力的系统和方法，例如在干涉式调制器中发现的。 在一个示例中，测试单元可以被配置为通过对指示基板的两个正交方向上的平均残余应力的光进行干涉测量来指示膜中的残余应力。 测试单元可以包括附接到基底的反射膜，其中膜被构造为平行四边形，其中每侧的至少一部分附着到基底，以及形成在膜的一部分和基底的一部分之间的干涉腔， 并且其中膜被配置为基于膜中的残余应力而变形并且调制指示膜变形量的光。