公开(公告)号：WO2011020038A2

公开(公告)日：2011-02-17

申请号：PCT/US2010045499

申请日：2010-08-13

Applicant: QUALCOMM INC ,  CHANDRASEKARAN ARVIND ,  RADOJCIC RATIBOR

Inventor： CHANDRASEKARAN ARVIND ,  RADOJCIC RATIBOR

IPC: H01L23/485

CPC classification number: H01L24/14 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/562 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/06505 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14505 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A packaged semiconductor product includes a packaging substrate coupled to a semiconductor die through an interconnect structure with elements of variable features. The interconnect structure may be bumps or pillars. The variable features of the interconnect structure induce a reverse bend on the semiconductor die that mitigates warpage of the semiconductor die during semiconductor assembly by balancing bending of the packaging substrate during reflow. The variable features can be variable height and/or variable composition.

Abstract translation: 封装半导体产品包括通过具有可变特征元件的互连结构耦合到半导体管芯的封装衬底。 互连结构可以是凸块或柱。 互连结构的可变特征在半导体管芯上引起反向弯曲，通过在回流期间平衡封装衬底的弯曲来减轻半导体组件期间半导体管芯翘曲。 可变特征可以是可变高度和/或可变成分。

公开(公告)号：WO2017004316A3

公开(公告)日：2017-02-16

申请号：PCT/US2016040283

申请日：2016-06-30

Applicant: QUALCOMM INC

Inventor： GU SHIQUN ,  LI YUE ,  RADOJCIC RATIBOR

IPC: H01L49/02 ,  H01L23/522

CPC classification number: H01L28/60 ,  H01L23/5223 ,  H01L23/53228 ,  H01L28/75

Abstract: Copper (Cu) grain boundaries can move during a thermal cycle resulting in the Cu grain position being offset. Such Cu pumping can disturb the surface of a bottom metal, and can physically break a dielectric of a metal-insulator-metal (MIM) capacitor (410). By capping the bottom metal (420) under the MIM capacitor with an anchoring cap (425), Cu pumping is reduced or eliminated and the reliability of the MIM capacitor is improved.

Abstract translation: 铜（Cu）晶界可以在热循环期间移动，导致Cu晶粒位置偏移。 这种Cu泵送可以干扰底部金属的表面，并且可以物理地破坏金属 - 绝缘体 - 金属（MIM）电容器（410）的电介质。 通过使用固定帽（425）将MIM电容器下方的底部金属（420）加盖，减少或消除了Cu泵浦，提高了MIM电容器的可靠性。

公开(公告)号：WO2012135832A2

公开(公告)日：2012-10-04

申请号：PCT/US2012031861

申请日：2012-04-02

Applicant: QUALCOMM INC ,  GU SHIQUN ,  RADOJCIC RATIBOR ,  LI YIMING

Inventor： GU SHIQUN ,  RADOJCIC RATIBOR ,  LI YIMING

IPC: H01L23/60

CPC classification number: H01L23/62 ,  H01L23/29 ,  H01L23/60 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A voltage-switchable dielectric layer may be employed on a die for electrostatic discharge (ESD) protection. The voltage-switchable dielectric layer functions as a dielectric layer between terminals of the die during normal operation of the die. When ESD events occur at the terminals of the die, a high voltage between the terminals switches the voltage-switchable dielectric layer into a conducting layer to allow current to discharge to a ground terminal of the die without the current passing through circuitry of the die. Thus, damage to the circuitry of the die is reduced or prevented during ESD events on dies with the voltage-switchable dielectric layer. The voltage-switchable dielectric layer may be deposited on the back side of a die for protection during stacking with a second die to form a stacked IC.

Abstract translation: 可以在用于静电放电（ESD）保护的管芯上采用电压可切换介电层。 在模具的正常操作期间，电压可切换介电层用作裸片的端子之间的介电层。 当ESD事件发生在管芯的端子处时，端子之间的高电压将电压可切换介电层切换为导电层，以允许电流放电至管芯的接地端子，而电流不通过管芯的电路。 因此，在具有电压可切换电介质层的管芯上的ESD事件期间，减小或防止了管芯电路的损坏。 可以在用第二管芯堆叠期间将电压可切换介电层沉积在管芯的背侧以用于保护以形成堆叠式IC。

公开(公告)号：WO2011063166A2

公开(公告)日：2011-05-26

申请号：PCT/US2010057305

申请日：2010-11-18

Applicant: QUALCOMM INC ,  RADOJCIC RATIBOR ,  CHANDRASEKARAN ARVIND ,  LANE RYAN

Inventor： RADOJCIC RATIBOR ,  CHANDRASEKARAN ARVIND ,  LANE RYAN

IPC: H01L23/52 ,  H01L21/60 ,  H01L23/538

CPC classification number: H01L25/0657 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/13025 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19104 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A hybrid interconnect includes a through silicon via and a wire bond. Hybrid interconnects enable better layout of a stacked IC by combining benefits from both interconnect technologies. In one hybrid interconnect, wire bonds couples a second tier die mounted on a first tier die to a redistribution layer in the first tier die. Through silicon vias in the first tier die are coupled to the wire bonds to provide communication. In another hybrid interconnect, a wire bond couples a redistribution layer on a first tier die to a packaging substrate on which the first tier die is mounted. The redistribution layer couples to a second tier die mounted on the first tier die to provide a power supply to the second tier die. Through silicon vias in the first tier die couple to the second tier die to provide communication from the packaging substrate to the second tier die.

Abstract translation: 混合互连包括硅通孔和引线键合。 混合互连通过结合两种互连技术的优势，实现更好的堆叠IC布局。 在一个混合互连中，引线接合将安装在第一层管芯上的第二层管芯耦合到第一层管芯中的重新分布层。 通过第一层裸片中的硅通孔耦合到引线键合以提供通信。 在另一种混合互连中，引线接合将第一层管芯上的重新分布层连接到其上安装第一层管芯的封装衬底。 再分布层耦合到安装在第一层管芯上的第二层管芯，以向第二层管芯提供电源。 通过第一层裸片中的硅通孔耦合到第二层裸片以提供从封装衬底到第二层裸片的通信。