公开(公告)号：JP2012257290A

公开(公告)日：2012-12-27

申请号：JP2012167490

申请日：2012-07-27

Applicant: Qualcomm Inc ,  クゥアルコム・インコーポレイテッドQualcomm Incorporated

Inventor： NAMSU KIM ,  BARNETT KENNETH CHARLES ,  VLADIMIR APARIN

IPC: H03F1/32 ,  H03F3/193 ,  H03F3/195

CPC classification number: H03F1/3211 ,  H03F1/22 ,  H03F1/223 ,  H03F1/26 ,  H03F1/3205 ,  H03F1/3276 ,  H03F3/45188 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2200/456 ,  H03F2200/489 ,  H03F2200/492 ,  H03F2203/45296 ,  H03F2203/45311 ,  H03F2203/45352 ,  H03F2203/45386 ,  H03F2203/45481 ,  H04B1/525

Abstract: PROBLEM TO BE SOLVED: To provide an LNA which has lower power consumption, smaller circuit area, and higher linearity.SOLUTION: In one arm of a differential amplifier 300, a first transistor 310 and a second transistor 320 are coupled as a first cascade pair, and a third transistor 330 and a fourth transistor 340 are coupled as a second cascade pair. The third transistor 330 has its gate coupled to the source of the second transistor 320, and the fourth transistor 340 has its drain coupled to the drain of the second transistor 320. The third transistor 330 generates distortion components used to cancel third order distortion components generated by the first transistor 310. An inductor 350 provides source degeneration for the first transistor 310 and improves distortion cancellation. The sizes of the second transistor 320 and the third transistor 330 are selected to reduce gain loss.

Abstract translation: 要解决的问题：提供具有较低功耗，较小电路面积和更高线性度的LNA。 解决方案：在差分放大器300的一个臂中，第一晶体管310和第二晶体管320作为第一级联对耦合，并且第三晶体管330和第四晶体管340作为第二级联对耦合。 第三晶体管330的栅极耦合到第二晶体管320的源极，并且第四晶体管340的漏极耦合到第二晶体管320的漏极。第三晶体管330产生用于消除产生的三阶失真分量的失真分量 电感器350为第一晶体管310提供源极退化并改善失真消除。 选择第二晶体管320和第三晶体管330的尺寸以减小增益损失。 版权所有（C）2013，JPO＆INPIT

公开(公告)号：JP2010022009A

公开(公告)日：2010-01-28

申请号：JP2009188040

申请日：2009-08-14

Applicant: Qualcomm Inc ,  クゥアルコム・インコーポレイテッドQualcomm Incorporated

Inventor： VLADIMIR APARIN ,  BALLANTYNE GARY JOHN ,  PERSICO CHARLES J

IPC: H04B1/40 ,  H04B1/10 ,  H04B7/005

Abstract: PROBLEM TO BE SOLVED: To provide an adaptive filter (430) for transmission leak signal cancellation. SOLUTION: There is described an adaptive filter, suitable for manufacturing on an RF integrated circuit, to be used for transmission (TX) leak cancellation in a wireless full-duplex communication system. The adaptive filter includes adders (530, 540) and an adaptive estimator (510). The adder receives a signal having a TX leak signal and an estimate signal having an estimate of the TX leak signal, the estimate signal is subtracted from the input signal, and an output signal having the attenuated TX leak signal is provided. The adaptive estimator receives the output signal and a reference signal having a first version of a transmission signal, estimates the TX leak signal in the input signal on the basis of the output signal and the reference signal, and provides the estimate signal. The adaptive estimator may also utilize an LMS algorithm to suppress, to a minimum, a mean square error between the TX leak signal in the input signal and the TX leak signal estimate in the estimate signal. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：提供用于传输泄漏信号消除的自适应滤波器（430）。 解决方案：描述了一种适用于在RF集成电路上制造的自适应滤波器，用于无线全双工通信系统中的传输（TX）泄漏消除。 自适应滤波器包括加法器（530,540）和自适应估计器（510）。 加法器接收具有TX泄漏信号的信号和具有TX泄漏信号的估计的估计信号，从输入信号中减去估计信号，并提供具有衰减的TX泄漏信号的输出信号。 自适应估计器接收输出信号和具有传输信号的第一版本的参考信号，基于输出信号和参考信号估计输入信号中的TX泄漏信号，并提供估计信号。 自适应估计器还可以利用LMS算法将输入信号中的TX泄漏信号与估计信号中的TX泄漏信号估计之间的均方误差降至最小。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2012182809A

公开(公告)日：2012-09-20

申请号：JP2012096513

申请日：2012-04-20

Applicant: Qualcomm Inc ,  クゥアルコム・インコーポレイテッドQualcomm Incorporated

Inventor： VLADIMIR APARIN

IPC: H04B1/40

CPC classification number: H04B1/525

Abstract: PROBLEM TO BE SOLVED: To provide techniques for reducing adverse effects of transmit signal leakage in a full-duplex, wireless communication system, and for reducing adverse effects of second order distortion and cross-modulation distortion of transmit signal leakage from a transmitter via a duplexer.SOLUTION: An adaptive filter 40 may include an estimator circuit that generates a transmit leakage signal estimate. A summer subtracts the estimate from the received signal to cancel transmit leakage and produce an output signal. The estimator circuit generates the transmit leakage signal estimate based on a reference signal and feedback from the output signal. The reference signal approximates the carrier signal used to generate the transmit signal in the transmitter. The reference signal may be provided by the same oscillator 42 used to produce the transmit carrier signal. The techniques may be effective in rejecting at least a portion of a transmit leakage signal, thereby reducing or eliminating distortion.

Abstract translation: 要解决的问题：提供用于减少全双工，无线通信系统中的发射信号泄漏的不利影响并减少来自发射机的发射信号泄漏的二阶失真和交叉调制失真的不利影响的技术 通过双工器。 解决方案：自适应滤波器40可以包括产生发射泄漏信号估计的估计器电路。 一个夏天从接收到的信号中减去估计值以消除发射泄漏并产生一个输出信号。 估计器电路基于参考信号和来自输出信号的反馈产生发射泄漏信号估计。 参考信号近似于用于在发射机中产生发射信号的载波信号。 参考信号可以由用于产生发射载波信号的相同的振荡器42提供。 这些技术可以有效地拒绝发射泄漏信号的至少一部分，从而减少或消除失真。 版权所有（C）2012，JPO＆INPIT

公开(公告)号：JP2013232976A

公开(公告)日：2013-11-14

申请号：JP2013150704

申请日：2013-07-19

Applicant: Qualcomm Inc ,  クゥアルコム・インコーポレイテッドQualcomm Incorporated

Inventor： DENG JUNXIONG ,  GURKANWAL SINGH SAHOTA ,  PRASHANTH AKULA ,  THOMAS MARRA ,  VLADIMIR APARIN

IPC: H04B1/04 ,  H04B7/06

CPC classification number: H04B1/04 ,  H03F1/0261 ,  H03F3/24 ,  H03F2200/321 ,  H03F2200/336 ,  H03F2200/451 ,  H03F2200/537

Abstract: PROBLEM TO BE SOLVED: To reduce power consumption in a radio frequency (RF) transmitter, where the largest power consumers among a plurality of transmitter blocks are amplifiers including a driver amplifier (DA) and a power amplifier (PA).SOLUTION: A transmitter comprises: a digital control block for dynamically regulating power consumption of the transmitter; and a first diver amplifier circuit comprising a plurality of bias-modes each corresponding to one power consumption level in the transmitter. The digital control block instructs the first diver amplifier circuit to operate in one selected bias-mode in order to regulate power consumption of the transmitter.

Abstract translation: 要解决的问题：为了降低射频（RF）发射机中的功率消耗，其中多个发射机块中的最大功率消耗者是包括驱动放大器（DA）和功率放大器（PA）的放大器。解决方案：发射机 包括：用于动态地调节发射机的功率消耗的数字控制块; 以及第一潜水员放大器电路，其包括多个偏置模式，每个偏置模式对应于发射机中的一个功率消耗水平。 数字控制块指示第一个发射器放大器电路以一个选定的偏置模式工作，以便调节发射器的功耗。

公开(公告)号：JP2013102486A

公开(公告)日：2013-05-23

申请号：JP2012285290

申请日：2012-12-27

Applicant: Qualcomm Inc ,  クゥアルコム・インコーポレイテッドQualcomm Incorporated

Inventor： VLADIMIR APARIN

IPC: H04B1/10 ,  H04B1/40

CPC classification number: H04B1/525 ,  H04B1/30

Abstract: PROBLEM TO BE SOLVED: To provide a method for reducing adverse effects of TX signal leakage in a full-duplex, wireless communication system.SOLUTION: To reduce or eliminate second order distortion of transmit signal leakage, a wireless device squares a combined signal that carries both a desired RX signal and a TX leakage signal. For example, the device may include a device that exhibits a strong, second order nonlinearity to, in effect, square the combined signal. The device subtracts the squared signal from the output of a mixer in a receive path, and canceling out at least some of the second-order distortion caused by the mixer. In this manner, the device can reduce the adverse effects of second order distortion of TX signal leakage, thereby enhancing or maintaining receiver sensitivity.

Abstract translation: 要解决的问题：提供一种减少全双工无线通信系统中TX信号泄漏的不利影响的方法。 解决方案：为了减少或消除发射信号泄漏的二阶失真，无线设备对携带所需RX信号和TX泄漏信号的组合信号进行平方。 例如，该装置可以包括展现强的二阶非线性的装置，其实际上对于组合信号的平方。 该装置从接收路径中的混频器的输出中减去平方信号，并且消除由混频器引起的至少一些二阶失真。 以这种方式，该装置可以减少TX信号泄漏的二阶失真的不利影响，从而增强或维持接收机灵敏度。 版权所有（C）2013，JPO＆INPIT

公开(公告)号：BRPI0509601A

公开(公告)日：2007-09-18

申请号：BRPI0509601

申请日：2005-04-01

Applicant: QUALCOMM INC

Inventor： PERSICO CHARLES J ,  VLADIMIR APARIN ,  WU YUE

IPC: H04B1/16 ,  H04B1/10 ,  H04B1/56

Abstract: To reduce power consumption, receiver circuit blocks within a wireless device are biased with less current whenever possible while still achieving the desired performance. The receiver circuit blocks may include a voltage controlled oscillator (VCO) that generates an oscillator signal used for frequency downconversion of a received signal from the forward link, a low noise amplifier (LNA) that amplifies the received signal, and a mixer that frequency downconverts the received signal. The VCO may be biased with less current if phase noise performance is less stringent, e.g., when (1) the wireless device is not transmitting on the reverse link, (2) a large amplitude jammer is not detected, and/or (3) the received signal level is sufficiently high. The bias currents of other receiver circuit blocks may also be adjusted based on transmitter activity, detected jammer, and/or received signal level.

公开(公告)号：BR112017017998A2

公开(公告)日：2018-04-10

申请号：BR112017017998

申请日：2016-02-01

Applicant: QUALCOMM INC

Inventor： HAIM MENDEL WEISSMAN ,  LIOR RAVIV ,  VLADIMIR APARIN ,  XIAOYIN HE

IPC: H04B1/40

Abstract: métodos, sistemas e dispositivos são descritos para a arquitetura de transceptor para comunicações sem fio de ondas milimétricas. um dispositivo pode incluir dois módulos de chip de transceptor configurados para comunicar em diferentes faixas de frequências. o primeiro módulo de chip de transceptor pode incluir um submódulo de banda base, um primeiro componente de front end de radiofrequência (rffe) e arranjo de antena associado. o segundo módulo de chip de transceptor pode incluir um segundo componente de rffe e arranjo de antena associado. o segundo módulo de chip de transceptor pode ser separado do primeiro módulo de chip de transceptor. o segundo módulo de chip de transceptor pode ser eletricamente acoplado ao submódulo de banda base do primeiro módulo de chip de transceptor.

公开(公告)号：MY127610A

公开(公告)日：2006-12-29

申请号：MYPI20015048

申请日：2001-10-31

Applicant: QUALCOMM INC

Inventor： VLADIMIR APARIN ,  SHAH PETER J

IPC: H03F1/26 ,  H03F1/32 ,  H03F1/34 ,  H03F3/19

Abstract: A RADIO FREQUENCY AMPLIFIER WITH IMPROVED LINEARITY AND MINIMAL THIRD-ORDER DISTORTION. THE AMPLIFIER INCLUDES A FIRST TRANSISTOR HAVING FIRST, SECOND AND THIRD TERMINALS WITH THE FIRST TERMINAL BEING AN INPUT TERMINAL AND THE SECOND TERMINAL BEING THE OUTPUT TERMINAL AND THE THIRD TERMINAL BEING A COMMON TERMINAL. A LINEARIZATION CIRCUIT IS INCLUDED HAVING FIRST AND SECOND TERMINALS. THE FIRST TERMINAL IS CONNECTED TO THE COMMON TERMINAL OF THE TRANSISTOR AND THE SECOND TERMINAL IS CONNECTED TO THE INPUT TERMINAL OF THE TRANSISTOR. IN A SPECIFIC EMBODIMENT, THE LINEARIZATION CIRCUIT IS IMPLEMENTED AS A UNITY GAIN BUFFER WITH AN INPUT TERMINAL CONNECTED TO THE COMMON TERMINAL OF THE TRANSISTOR AND AN OUTPUT TERMINAL CONNECTED TO THE INPUT TERMINAL OF THE TRANSISTOR. IN ACCORDANCE WITH THE INVENTIVE TEACHINGS, THE BUFFER HAS A LOW GAIN AND HIGH OUTPUT IMPEDANCE AT FIRST FREQUENCY (F1) OF A FIRST SIGNAL APPLIED TO THE CIRCUIT AND A SECOND FREQUENCY (F2) OF A SECOND SIGNAL APPLIED TO THE CIRCUIT AND A UNITY GAIN AND LOW OUTPUT IMPEDANCE A DIFFERENCE BETWEEN THE FIRST AND SECOND FREQUENCIES. IN ANOTHER SPECIFIC EMBODIMENT, THE INDUCTOR IS INSERTED BETWEEN THE OUTPUT OF THE UNITY GAIN BUFFER AND THE INPUT TERMINAL OF THE TRANSISTOR. IN ALTERNATIVE EMBODIMENTS, CIRCUITRY IS SHOWN FOR PROVIDING A DIRECT CURRENT OFFSET AT THE INPUT OF THE TRANSISTOR. AS ANOTHER ALTERNATIVE, THE LINEARIZATION CIRCUIT CONSISTS OF SERIES INDUCTOR AND CAPACITOR CONNECTED BETWEEN THE COMMON AND INPUT TERMINALS OF THE TRANSISTOR. IN YET ANOTHER EMBODIMENT, THE LINEARIZATION CIRCUIT CONSISTS OF THE FIRST AND THE SECOND SERIES INDUCTOR AND CAPACITOR CIRCUITS. THE FIRST SERIES LC CIRCUIT IS CONNECTED BETWEEN THE COMMON TERMINAL OF THE TRANSISTOR AND GROUND AND THE SECOND SERIES LC CIRCUIT IS CONNECTED BETWEEN THE INPUT TERMINAL OF THE TRANSISTOR AND GROUND. (FIG. 3)

公开(公告)号：BR112017002368A2

公开(公告)日：2017-12-05

申请号：BR112017002368

申请日：2015-07-07

Applicant: QUALCOMM INC

Inventor： VLADIMIR APARIN ,  YOUNG CHEUL YOON

IPC: G06N3/04

Abstract: a presente invenção se refere a método para configuração de um neurônio artificial incluindo receber um conjunto de sequências de disparos de entrada que compreendem representações da codificação da modulação de pulsos assíncronos. o método também inclui a geração de picos de saída que representam uma semelhança entre o conjunto de sequências de disparos de entrada e um filtro espacial-temporal.

公开(公告)号：BR112013032604A2

公开(公告)日：2017-08-01

申请号：BR112013032604

申请日：2012-06-21

Applicant: QUALCOMM INC

Inventor： VLADIMIR APARIN

IPC: G06N3/08

Abstract: resumo “método e aparelho para regra de aprendizagem competitiva local que leva a conectividade esparsa”. determinados aspectos da presente invenção suportam uma regra de aprendizagem competitiva local aplicada em uma rede computacional que leva à conectividade esparsa entre as unidades de processamento da rede. a presente invenção provê uma modificação na regra de aprendizagem de oja, que modifica a restrição à soma de pesos elevados ao quadrado na regra de oja. esta restrição pode ser intrínseca e local em oposição às normalizações multiplicadora e subtrativa comumente utilizadas, que são explícitas e exigem o conhecimento de todos os pesos de entrada de uma unidade de processamento para a atualização de cada um deles individualmente. a regra apresentada provê convergência para um vetor de peso que é mais esparso (isto é, tem mais elementos zero) que o vetor de peso aprendido pela regra de oja original. tal conectividade esparsa pode levar a uma seletividade mais elevada das unidades de processador com relação a recursos específicos e pode exigir menos memória para armazenar a configuração de rede e menos energia para acioná-la. 1/1