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    Method and apparatus for providing variable rate data in communications system using statistical multiplexing
    1.
    发明专利
    Method and apparatus for providing variable rate data in communications system using statistical multiplexing 有权
    在使用统计多路复用的通信系统中提供可变速率数据的方法和装置

    公开(公告)号：JP2003324776A

    公开(公告)日：2003-11-14

    申请号：JP2003084649

    申请日：2003-03-26

    Applicant: Qualcomm Inc ,  クゥアルコム・インコーポレイテッド

    Inventor： ZEHAVI EPHRAIM ,  WOLF JACK K ,  SCHIFF LEONARD N

    IPC: H04B7/15 ,  H04J3/24 ,  H04J11/00 ,  H04J13/00 ,  H04L1/00 ,  H04L12/28 ,  H04L12/56 ,  H04W72/04 ,  H04Q7/38 ,  H04Q7/36

    CPC classification number: H04L1/0083 ,  H04B7/18513 ,  H04J3/247 ,  H04J13/00 ,  H04L1/0014 ,  H04W72/0486

    Abstract: PROBLEM TO BE SOLVED: To provide an apparatus and method for providing variable rate data in a communications system using statistical multiplexing. SOLUTION: This invention discloses the variable rate transmission system wherein when the capacity of a traffic channel is equal to or more than a data rate of a packet, the packet of variable rate data generated by a variable rate data source (20) is modulated on the traffic channel by a traffic channel modulator (30). When the capacity of the traffic channel is smaller than the data rate, the packet of variable rate data is modulated onto the traffic channel by the traffic channel modulator (30) and modulated onto at least one overflow channel by a traffic channel modulator (32). COPYRIGHT: (C)2004,JPO

    Abstract translation: 要解决的问题：提供一种使用统计复用在通信系统中提供可变速率数据的装置和方法。 解决方案：本发明公开了一种可变速率传输系统，其中当业务信道的容量等于或大于分组的数据速率时，由可变速率数据源（20）产生的可变速率数据分组， 通过业务信道调制器（30）在业务信道上进行调制。 当业务信道的容量小于数据速率时，可变速率数据的分组由业务信道调制器（30）调制到业务信道上，并由业务信道调制器（32）调制到至少一个溢出信道上， 。 版权所有（C）2004，JPO

    FAST TRELLIS CODING AND DECODING METHOD
    6.
    发明专利
    FAST TRELLIS CODING AND DECODING METHOD 失效

    公开(公告)号：JPH1127157A

    公开(公告)日：1999-01-29

    申请号：JP24153997

    申请日：1997-09-05

    Applicant: QUALCOMM INC

    Inventor： WOLF JACK K

    IPC: H04L27/18 ,  H03M13/23 ,  H03M13/25 ,  H04L1/00 ,  H03M13/12

    Abstract: PROBLEM TO BE SOLVED: To provide a method and a device for constructing a fast trellis code for PSK(phase shift keying) modulation which is encoded and decoded by using an encoder and a decoder for punctured convolutional coding of 1/2 coding rate and to design trellis encoder and decoder for 8-PSK, specially for coding in 5/6 coding rate. SOLUTION: One set on N input data bits is received by a decoder 1. Input bits i1 ,..., ik of the encoder 1 are convolutionally encoded by using an encoder with k/(k+1) coding rate based on a punctured coding rate 1/2 convolutional encoder 1. Coded signals a1 , a2 ,..., ak and ak+1 are supplied to a multiplexer 2 together with residual input bits ik+1 , ik+2 ,..., iN. The multiplexer 2 connects a coded signal with residual input data bits and supplies a set of data to an M element modulator 3. Each set consists of log2 M elements and is continuously supplied to the modulator 3 for transmission.

    DECODIFICADOR PARA CODIGOS DE BLOQUE LINEALES CON CORRECCION DE SUPRESIONES Y ERRORES INDIVIDUALES.
    8.
    发明专利
    DECODIFICADOR PARA CODIGOS DE BLOQUE LINEALES CON CORRECCION DE SUPRESIONES Y ERRORES INDIVIDUALES. 未知

    公开(公告)号：ES2248631T3

    公开(公告)日：2006-03-16

    申请号：ES02794135

    申请日：2002-12-03

    Applicant: QUALCOMM INC

    Inventor： BUTLER BRIAN K ,  WOLF JACK K ,  MILNE RYAN

    IPC: H03M13/15 ,  H03M13/19 ,  H03M13/37

    Abstract: Procedimiento para realizar la decodificación de bloque en un bloque recibido de símbolos codificados previamente de columna en columna con un código de bloque lineal (N, K), y de fila en fila con un código de detección de errores, que comprende: la identificación de una palabra de código correspondiente a una columna del bloque recibido que contiene un error de símbolo no detectado mediante dicho código de detección de errores; la determinación del emplazamiento del error de símbolo no detectado en la palabra de código; el marcado de la fila del bloque recibido que contiene el error de símbolo no detectado, como fila suprimida; y la realización de la decodificación de bloque para el bloque recibido que contiene la fila marcada como suprimida.

    9.
    发明专利
    未知

    公开(公告)号：ES2210299T3

    公开(公告)日：2004-07-01

    申请号：ES95924673

    申请日：1995-06-22

    Applicant: QUALCOMM INC

    Inventor： ANTONIO FRANKLIN P ,  GILHOUSEN KLEIN S ,  WOLF JACK K ,  ZEHAVI EPHRAIM

    IPC: H01Q3/26 ,  H04B1/7085 ,  H01Q3/24 ,  H04B1/7117 ,  H04B1/712 ,  H04B7/26 ,  H04L1/06 ,  H04W16/28 ,  H04Q7/36

    Abstract: A system and method for adaptively sectorizing channel resources within a digital cellular communication system is disclosed herein. The system includes an antenna arrangement for providing at least first and second electromagnetic beams for receiving a first information signal transmitted by a specific one of a plurality of users, thereby generating first and second received signals. A first set of beam-forming signals are then generated from the first and second received signals. A demodulating receiver is provided for demodulating at least first and second beam-forming signals included within the first set of beam-forming signals, thereby producing first and second demodulated signals. The system further includes a tracking network for tracking multipath information signals, received from various positions and angles of incidence, based on comparison of the first and second demodulated signals.

    Erasure and single error correction decoder for linear product codes
    10.
    发明专利
    Erasure and single error correction decoder for linear product codes 未知

    公开(公告)号：AU2002359587A8

    公开(公告)日：2003-06-17

    申请号：AU2002359587

    申请日：2002-12-03

    Applicant: QUALCOMM INC

    Inventor： MILNE RYAN ,  WOLF JACK K ,  BUTLER BRIAN K

    IPC: H03M13/15 ,  H03M13/19 ,  H03M13/37 ,  H03M13/29

    Abstract: Techniques for efficiently performing erasure-and-single-error correction block decoding on a received block of symbols previously coded column-wise with an (N, K) linear block code and row-wise with an error detection code (e.g., a CRC code). Initially, each row of the received block is marked as either an erased row or an un-erased row. To perform erasure-and-single-error correction block decoding on the received block, a codeword corresponding to a column of the received block containing an undetected symbol error is initially identified. The location of the symbol error in the codeword is then determined based on a particular block decoding scheme and corresponding to the selected (N, K) block code. The row of the received block containing the symbol error is then marked as an erased row. Block decoding may then be performed for the received block with the newly marked erased row containing the symbol error.

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