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Patent Agency Ranking
公开(公告)号：WO2020251852A1
公开(公告)日：2020-12-17
申请号：PCT/US2020/036346
申请日：2020-06-05
Applicant: RAYTHEON COMPANY
Inventor： WILDER, Kevin , NUFIO-MOLINA, Jonathan, E. , THIESSEN, Phillip, W. , SIKINA, Thomas, V. , BENEDICT, James, E. , SOUTHWORTH, Andrew, R. , KLEK, Erika
Abstract: An array includes a support structure configured to support columns of beamformer assemblies, and a plurality of beamformer assemblies supported by the support structure. Each beamformer assembly includes at least one beamformer having at least one first beamformer segment and at least one second beamformer segment configured to interconnect with the first beamformer segment.
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公开(公告)号：WO2019168996A1
公开(公告)日：2019-09-06
申请号：PCT/US2019/019851
申请日：2019-02-27
Applicant: RAYTHEON COMPANY
Inventor： NUFIO-MOLINA, Jonathan, E. , SIKINA, Thomas, V. , BENEDICT, James, E. , SOUTHWORTH, Andrew, R. , AZADZOI, Semira, M.
Abstract: A method of manufacturing a power divider circuit includes milling a conductive material disposed upon a first substrate to form a signal trace. The signal trace includes a division from a single trace to two arm traces, with each of the two arm traces having a proximal end electrically connected to the single trace and a distal end electrically connected to each of two secondary traces. The method further includes depositing a resistive ink between the two distal ends to form a resistive electrical connection between the two arm traces, bonding a second substrate to the first substrate to substantially encapsulate the traces between the first substrate and the second substrate, and milling through at least one of the first substrate or the second substrate to provide access to at least one of the traces. A signal divider is further disclosed.
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公开(公告)号：WO2019094452A1
公开(公告)日：2019-05-16
申请号：PCT/US2018/059602
申请日：2018-11-07
Applicant: RAYTHEON COMPANY
Inventor： SIKINA, Thomas, V. , HAVEN, John, P. , BENEDICT, James, E. , NUFIO-MOLINA, Jonathan, E. , SOUTHWORTH, Andrew, R.
Abstract: A low profile array (LPA) includes an antenna element array layer having at least one Faraday wall, and a beamformer circuit layer coupled to the antenna element array layer. The beamformer circuit layer has at least one Faraday wall. The Faraday walls extends between ground planes associated with at least one of the antenna element array layer and the beamformer circuit layer.
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公开(公告)号：EP3760015A1
公开(公告)日：2021-01-06
申请号：EP19711472.1
申请日：2019-02-27
Applicant: Raytheon Company
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公开(公告)号：EP3707778A1
公开(公告)日：2020-09-16
申请号：EP18836682.7
申请日：2018-11-07
Applicant: Raytheon Company
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