Abstract:
A level shifter circuit is presented that can apply a negative voltage level (VBB at TrFG) to non-selected blocks while still being able to drive a high positive level (VRDEC) when selected. An exemplary embodiment presents a negative level shifter that is not susceptible to low voltage pfet breakdown. This allows for a high voltage level shifter (transfer gate) that can drive a negative level for unselected blocks and, when enabled for a selected block, can still drive a positive high voltage level. By using a pair of low voltage PMOS device (M9, M10) whose n-wells share the same level as other PMOS transistors in the design, layout area can be minimized. The gates of this pair of PMOSs (M9, M10) are connected to VSS, thereby preventing these low voltage PMOS devices from thin oxide breakdown.
Abstract:
A charge pump system uses a dynamic switching approach, where the pump connections are independent of the load for each output. One large pump is designed to be shared between all of the outputs for use during the ramp up during recovery, with each output level also have one designated pump to maintain its level when under regulation. For a three output example, this corresponds to one large and three small pumps. Each small pump is designed with capability that can maintain its output at its regulation level. Each of these pumps can be tailored to the corresponding output level, such as the number of stages being higher in the pump to supply the higher output level. The large pump unit is constructed to be ample to provide sufficient drive to be able to assist in the ramp up phase for all of the outputs and has as many switches needed to connect the pump with all the needed outputs.
Abstract:
Methods for controlling a ramp rate of an output voltage derived from one or more charge pumps and reducing variation in the ramp rate due to process, voltage, and temperature (PVT) variations are described. In some embodiments, the ramp rate of the output voltage from one or more charge pumps may be controlled using a ramp rate control circuit that uses a digital counter to adjust (or step up) the output voltage from the one or more charge pumps based on a ramp rate schedule. The ramp rate schedule may specify varying output voltage levels for the one or more charge pumps during a time period in which the output voltage charges up from a first voltage to a second voltage greater than the first voltage.
Abstract:
A regulator system for a charge pump system divides the binary decoding into two branches. One controls a set of parallel connected resistors for fine output voltage steps. The other branch controls a serial resistor to provide the large step size. For example, a 9-bit digital input signal is split into 2 least significant for the fine adjustment and the other 7 bits for the larger adjustments. In the example of a 50mV step size, in one current path 2 bits of the binary input then control two parallel resistors for 50mV and 100mV step size, and in the other current path 7 bits are used for one-hot-decode control serial resistors to provide a 200mV step size. A unity gain operational amplifier and a high voltage device are added in between the two branches to decouple the parasitic capacitance of large parallel resistors from the other elements. Thus, the sensing node consequently has less parasitic capacitance and is more sensitive to output level movement, resulting in less ripple at the output node.
Abstract:
A charge pump system can provide multiple regulated output levels, including several concurrently, in an arrangement that can reduce the area and power consumption of such a high voltage generation system. The charge pump system can be dynamically reconfigurable based on output requirements. When output level is low, but required for a large AC, DC load, the system is configured in parallel to share the load. When a higher output is required, such as for a programming in a non-volatile memory, the system is configured in serial to generate the desired high output level. The exemplary embodiment uses all of the pump units in each operation and, hence, is able to be optimized for smaller pump area and less power consumption, while still delivering the same pump ability as larger, more power consuming arrangements.