公开(公告)号：JPH09284063A

公开(公告)日：1997-10-31

申请号：JP12961996

申请日：1996-05-24

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： MERUKIOTSURE BURUTSUKOREERI ,  GAETAANO KOSENCHIINO ,  MARUKO DEMICHIERI ,  JIUSETSUPE PATSUTEI

IPC: G05F3/22 ,  G05F3/26 ,  H03F3/343 ,  H03K17/04 ,  H03K17/60

Abstract: PROBLEM TO BE SOLVED: To provide the current generator stage for integrated analog circuit in which a power-down time and a power-up time are considerably reduced. SOLUTION: A current generator stage 1 of a type having a current source 2 inserted between a 1st reference power supply voltage Vdd and, a 1st fixed reference voltage GND is provided with a at least one current mirror circuit 5 connecting to a current source 2 to produce at least one output current and a bias circuit 10 connecting to the current source 2 to apply a bias voltage to the current source. The bias circuit 10 of the current generator stage 1 has an energy storage circuit 11, and the energy storage circuit 11 is in the 1st circuit mode indicating a combination of a 1st reactance X1 and a 2nd reactance X2 when the current source 2 is set in the 1st operating mode and in the 2nd circuit mode to apply a prescribed bias voltage to the current source 2 when the current source 2 is in the 2nd operation mode.