公开(公告)号：JPH04180269A

公开(公告)日：1992-06-26

申请号：JP30914090

申请日：1990-11-14

Applicant: SHARP KK

Inventor： ITO TAKUYA ,  KUBO MASARU

IPC: H01L31/10 ,  H01L27/144 ,  H01L31/0216 ,  H01L31/04

Abstract: PURPOSE:To improve photosensitivity with junction leakage by prevented by overlaying the photodetecting face of a photodetector with a diffusion layer which covers a surface including a junction different in conductivity from a semiconductor layer and by spreading the surface of that layer with a nitride film. CONSTITUTION:The surface of a P-type semiconductor substrate 2 is overlaid with an N-type epitaxial layer 1, and an N-type epitaxial layer 1 inside P-type isolation diffusion layers 5, 5 constitutes a photodiode by a PN junction with the underlying P-type semiconductor substrate 2. A thin P-type diffusion layer 6 is formed from part of the surface of both side P-type isolation diffusion layers 5, 5 to the whole surface of the N-type epitaxial layer 1 of a photodiode region. The surface of the diffusion layer 6 is spread with an oxide film 4, which is then removed, and the surface is spread with a nitride film 3. Therefore, no PN junctions exist under the nitride film 3. This refuses increases in junction leakage, provides a nitride film of high antireflection effect over the whole photodetection face, and improves photosensitivity.

公开(公告)号：JPH02205079A

公开(公告)日：1990-08-14

申请号：JP2547189

申请日：1989-02-02

Applicant: SHARP KK

Inventor： ITO TAKUYA ,  NOZAKI YOSHIAKI

IPC: H01L31/10 ,  H01L27/14

Abstract: PURPOSE:To obtain a high-speed and high-sensitive light receiving element with a built-in circuit easily by forming a light receiving element at high resistivity in a thick epitaxial layer which is grown at the surface of a semiconductor substrate, and forming a circuit element at low resistivity in a thin epitaxial layer which is grown in the recess of the epitaxial layer. CONSTITUTION:P -type diffusion layer 8 is formed at one part of the surface of a thick I-type epitaxial layer 21 of high resistivity and P -type diffusion layer 9 is formed at one part of the surface of a thin N-type epitaxial layer 14 of low resistivity, and next an N-type diffusion layer 10 is formed at one part of the P -type diffusion layer 9, and an N -type diffusion layer 11, which reaches an N -type buried diffusion layer 13 from the surface, is formed at one part of the N-type epitaxial layer 14. This way, a light receiving element 16 consisting of a PIN photo diode is formed at the part of a thick epitaxial layer 21 of high resistivity, and a circuit element 17 consisting of an NPN transistor is formed at the part of the thin epitaxial layer of low resistivity.

公开(公告)号：JPH0242768A

公开(公告)日：1990-02-13

申请号：JP19247488

申请日：1988-08-01

Applicant: SHARP KK

Inventor： KUBO MASARU ,  ITO TAKUYA

IPC: H01L31/10 ,  H01L27/14

Abstract: PURPOSE:To make a high-speed and high-sensitivity photodetector with a built-in circuit by a method wherein a photodetector is formed in a part of a high- resistivity epitaxial layer corresponding to a recessed part and a circuit element is formed in a high-resistivity epitaxial layer corresponding to a flat part. CONSTITUTION:A photodetector 2 is formed in a part of a thick and high- resistivity epitaxial layer 3 corresponding to a recessed part; a layer of a second conductivity type is formed and a circuit element 7 is formed in a part of a thin and a high-resistivity epitaxial layer 3 corresponding to a flat part. Since the high-resistivity and thick epitaxial layer 3 is used for the photodetector, its response speed is fast and, in addition, its optical sensitivity can be enhanced. Since the thin layer 3 can be utilized for the part of the circuit element, semiconductor layers whose thickness are optimum can be utilized for the photodetector and the circuit element. Thereby, a high-speed and high-sensitivity photodetector with a built-in circuit can be manufactured.

公开(公告)号：JPS6319882A

公开(公告)日：1988-01-27

申请号：JP16431686

申请日：1986-07-11

Applicant: SHARP KK

Inventor： ITO TAKUYA ,  YOSHIKAWA TOSHIBUMI

IPC: H01L31/10 ,  H01L31/0352

Abstract: PURPOSE:To accelerate the response speed of photodiode by reducing slow current component by a method wherein the thickness of substrate below a photodiode is made thinner than that of the part other than the part below the photodiode. CONSTITUTION:A P type silicon substrate 1 is made thinner below a photodiode part 3 by anisotropic etching process. Resultantly, the thickness t1 of P type silicon substrate 1 below the photodiode 3 is thinner than the thickness t2 of the part other than the part below the photodiode part 3. The response speed of photodiode is proportional to 1/2 of the distance from the end of P type silicon substrate to the junction with an N type epitaxial layer. Through these procedures, the response speed of photodiode can be accelerated by making the P type silicon substrate 1 thinner while the sensitivity thereof may sometimes deteriorate but almost negligibly.

公开(公告)号：JPS631056A

公开(公告)日：1988-01-06

申请号：JP14424686

申请日：1986-06-20

Applicant: SHARP KK

Inventor： KUBO MASARU ,  ITO TAKUYA

IPC: H01L27/14 ,  H01L27/144 ,  H01L31/10

Abstract: PURPOSE:To improve reliability, and to obtain normal operation even with fine currents by forming a defective layer into a substrate and preventing carriers generated in the defective layer and a nondefective layer in the lower section of the defective layer from reaching a photodiode section and a signal processing section. CONSTITUTION:A defective layer 12 in an element is shaped by thermally treating a P-type substrate 11 and precipitating oxygen in a wafer, thus forming nondefective layers 13, 38 in the substrate 11 in the vicinity of the defective layer 12. Carriers generated in the layers 12 and 28 cannot reach a junction surface between an N-type epitaxial layer 32 in an N-P-N transistor section 14 and the substrate 11, a junction surface between an N-type epitaxial layer 21 in a P-N-P transistor section 15 and the substrate 11 and a junction surface between an N-type buried diffusion layer 24 in a photodiode section 16 and the substrate 11. Accordingly, only carriers 29 generated in the nondefective layer 13 formed to the upper section of the defective layer 12 can function as parasitic photocurrents.

公开(公告)号：JPS62101076A

公开(公告)日：1987-05-11

申请号：JP24215985

申请日：1985-10-28

Applicant: SHARP KK

Inventor： KUBO MASARU ,  OKADA KEIICHI ,  YOSHIOKA MINORU ,  ITO TAKUYA ,  YOSHIKAWA TOSHIBUMI

IPC: H01L29/08 ,  H01L29/78

Abstract: PURPOSE:To obtain a high dielectric strength V-MOS-FET whose ON resistance is reduced without increasing the chip size by forming a buried layer with a low specific resistivity on a part of the boundary between a semiconductor substrate and an epitaxial layer facing a gate. CONSTITUTION:In a power MOS-FET, after an N type diffused region 11 is formed in an N type semiconductor substrate 1, an N-type epitaxial layer 3 is formed. When the epitaxial layer 3 is formed, a part of the N type impurity migrates from the diffused region 11 into the epitaxial layer 3 and an N type buried layer 12 is formed. The buried layer 12 is formed at the position facing a gate 9. A source 5 and the gate 9 are formed on the surface part of the epitaxial layer 3 to obtain an N-type channel vertical power MOS-FET. With this constitution, as the buried layer with a low specific resistivity is provided, a vertical insulated gate type field effect semiconductor device whose ON resistance can be reduced without increasing the chip size can be obtained.

公开(公告)号：JPS62101077A

公开(公告)日：1987-05-11

申请号：JP24216085

申请日：1985-10-28

Applicant: SHARP KK

Inventor： YOSHIKAWA TOSHIBUMI ,  OKADA KEIICHI ,  KUBO MASARU ,  YOSHIOKA MINORU ,  ITO TAKUYA

IPC: H01L29/08 ,  H01L29/78

Abstract: PURPOSE:To obtain a high dielectric strength VD-MOS-FET whose ON resistance is reduced without increasing the chip size by providing an impurity region with a low specific resistivity in the surface part of an epitaxial layer. CONSTITUTION:In a powder VD-MOS-FET, the bottom surface of an N type semiconductor substrate 1 is used as a drain 2 and an N-type epitaxial layer 3 is formed on its top surface and P-type base regions 4 are formed in the parts of its surface part and N type regions 5 with a low specific resistivity are formed in the parts of the surface parts of the P-type base regions 4 as sources 6. A gate 9 is provided above a channel region 7, which is the other part of the surface part of the P-type region 4, with an SiO2 film 8 in between. An N type impurity region 12 with a low specific resistivity is formed in the surface part of the epitaxial layer 3 between the base regions 4. As the impurity region 12 is provided, the ON resistance at that part is significantly reduced so that the whole ON resistance can be reduce without increasing the chip size.

公开(公告)号：JPH02142181A

公开(公告)日：1990-05-31

申请号：JP29532588

申请日：1988-11-22

Applicant: SHARP KK

Inventor： YAMAMOTO MOTOHIKO ,  KUBO MASARU ,  ITO TAKUYA

IPC: H01L31/10 ,  H01L27/14

Abstract: PURPOSE:To obtain a photodetector incorporated in a circuit characterized by excellent light sensitivity and response speed by adding several steps for low-resistivity N-type epitaxial growing of one time, high-resistivity N-type epitaxial growing of one time and N-type embedding diffusions of two times. CONSTITUTION:A low-resistivity N-type epitaxial layer 8 and a high-resistivity N-type epitaxial layer 10 are laminated on a first N-type embedded diffused layer 2 at a part of a photodiode A. A second N-type embedded diffused layer 9, which is diffused in a low-resistivity N-type epitaxial layer 8, and a high- resistivity N-type epitaxial layer 10 are laminated on an N-type epitaxial layer 2 at a part of an NPN transistor B.

公开(公告)号：JPH06224204A

公开(公告)日：1994-08-12

申请号：JP1169093

申请日：1993-01-27

Applicant: SHARP KK

Inventor： ITO TAKUYA

IPC: H01L21/322

Abstract: PURPOSE:To provide a highly reliable semiconductor wafer the strength of which is strong and which does not cause crystal defect in itself at the time of heat treating. CONSTITUTION:A high-oxygen-concentration wafer 1, 13X10 atoms/cm or over in oxygen concentration and a low-oxygen-concentration wafer 2, 11X10 atoms/cm or under in oxygen concentration are bonded directly, and a circuit part is formed on the side of the low-oxygen-concentration wafer 2.

公开(公告)号：JPS6263472A

公开(公告)日：1987-03-20

申请号：JP20390085

申请日：1985-09-13

Applicant: SHARP KK

Inventor： KUBO MASARU ,  OKADA KEIICHI ,  YOSHIOKA MINORU ,  ITO TAKUYA ,  YOSHIKAWA TOSHIBUMI

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/78

Abstract: PURPOSE:To reduce ON resistance, by forming a groove in the back surface of a semiconductor substrate layer beneath a gate so that the groove penetrates through the substrate layer and cuts into an epitaxial layer, and forming a high concentration layer having the same conductivity type as the substrate layer in the substrate layer facing a drain electrode. CONSTITUTION:Anisotropic etching is performed in the back surface of a substrate layer 1 beneath each gate, and a groove 11 is formed. A high concentration N layer 12 is formed from the back surface side of the substrate layer 1, in which the groove 11 is formed. A drain electrode 10 is formed on the surface of the N layer 12. The groove 11 has the depth penetrating at least the substrate layer 1 and reaching an epitaxial layer 2. It is desirable that the depth of the groove is made as deep as possible in decreasing the ON resistance within a range the withstanding voltage can be maintained.